HARDWARE ACCELERATION FOR WWAN TECHNOLOGIES
Systems and methods for wireless communications are provided. These include data deciphering components, interrupt processing components, adaptive aggregations methods, optimized data path processing, buffer pool processing, application processing where data is formatted in a suitable format for a d...
Gespeichert in:
| Hauptverfasser: | , , , , , , , , , , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng ; fre |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | LIOY, MARCELLO, V TRAN, JEAN-MARIE QD KUMAR, VANITHA, A NARAYAN, SRIRAM BABBAR, UPPINDER, S KHAN, IRFAN, A MIR, IDREAS MAHESHWARI, SHAILESH CHHABRA, GURVINDER, S NAGPAL, VIKAS KOHLENZ, MATHIAS KLINGENBRUNN, THOMAS JIM, SAMSON |
| description | Systems and methods for wireless communications are provided. These include data deciphering components, interrupt processing components, adaptive aggregations methods, optimized data path processing, buffer pool processing, application processing where data is formatted in a suitable format for a destination process, and Keystream bank processing among other hardware acceleration features. Such systems and methods are provided to simplify logic designs and mitigate processing steps during wireless network data processing.
Systèmes et procédés pour communications sans fil avec: composants de décryptage de données, composants de traitement d'interruption, procédés d'agrégation adaptative, traitement de chemins de données optimisés, traitement de pools de mémoire tampon, traitement d'application lorsque les données sont formatées selon un format convenable pour un processus de destination, traitement d'une banque de flux de clés, parmi d'autres éléments d'accélération de matériel: De tels systèmes et procédés permettent de simplifier les conceptions logiques et de limiter les opérations de traitement lors du traitement de données de réseau sans fil. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_WO2009155570A2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>WO2009155570A2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_WO2009155570A23</originalsourceid><addsrcrecordid>eNrjZND2cAxyCXcMclVwdHZ29XENcgzx9PdTcPMPUggPd_RTCHF19vDz9_F393QN5mFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8eH-RgYGloampqbmBo5GxsSpAgAL2SXo</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>HARDWARE ACCELERATION FOR WWAN TECHNOLOGIES</title><source>esp@cenet</source><creator>LIOY, MARCELLO, V ; TRAN, JEAN-MARIE QD ; KUMAR, VANITHA, A ; NARAYAN, SRIRAM ; BABBAR, UPPINDER, S ; KHAN, IRFAN, A ; MIR, IDREAS ; MAHESHWARI, SHAILESH ; CHHABRA, GURVINDER, S ; NAGPAL, VIKAS ; KOHLENZ, MATHIAS ; KLINGENBRUNN, THOMAS ; JIM, SAMSON</creator><creatorcontrib>LIOY, MARCELLO, V ; TRAN, JEAN-MARIE QD ; KUMAR, VANITHA, A ; NARAYAN, SRIRAM ; BABBAR, UPPINDER, S ; KHAN, IRFAN, A ; MIR, IDREAS ; MAHESHWARI, SHAILESH ; CHHABRA, GURVINDER, S ; NAGPAL, VIKAS ; KOHLENZ, MATHIAS ; KLINGENBRUNN, THOMAS ; JIM, SAMSON</creatorcontrib><description>Systems and methods for wireless communications are provided. These include data deciphering components, interrupt processing components, adaptive aggregations methods, optimized data path processing, buffer pool processing, application processing where data is formatted in a suitable format for a destination process, and Keystream bank processing among other hardware acceleration features. Such systems and methods are provided to simplify logic designs and mitigate processing steps during wireless network data processing.
Systèmes et procédés pour communications sans fil avec: composants de décryptage de données, composants de traitement d'interruption, procédés d'agrégation adaptative, traitement de chemins de données optimisés, traitement de pools de mémoire tampon, traitement d'application lorsque les données sont formatées selon un format convenable pour un processus de destination, traitement d'une banque de flux de clés, parmi d'autres éléments d'accélération de matériel: De tels systèmes et procédés permettent de simplifier les conceptions logiques et de limiter les opérations de traitement lors du traitement de données de réseau sans fil.</description><language>eng ; fre</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRICITY ; JAMMING OF COMMUNICATION ; PHYSICS ; SECRET COMMUNICATION ; TRANSMISSION ; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><creationdate>2009</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20091223&DB=EPODOC&CC=WO&NR=2009155570A2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20091223&DB=EPODOC&CC=WO&NR=2009155570A2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LIOY, MARCELLO, V</creatorcontrib><creatorcontrib>TRAN, JEAN-MARIE QD</creatorcontrib><creatorcontrib>KUMAR, VANITHA, A</creatorcontrib><creatorcontrib>NARAYAN, SRIRAM</creatorcontrib><creatorcontrib>BABBAR, UPPINDER, S</creatorcontrib><creatorcontrib>KHAN, IRFAN, A</creatorcontrib><creatorcontrib>MIR, IDREAS</creatorcontrib><creatorcontrib>MAHESHWARI, SHAILESH</creatorcontrib><creatorcontrib>CHHABRA, GURVINDER, S</creatorcontrib><creatorcontrib>NAGPAL, VIKAS</creatorcontrib><creatorcontrib>KOHLENZ, MATHIAS</creatorcontrib><creatorcontrib>KLINGENBRUNN, THOMAS</creatorcontrib><creatorcontrib>JIM, SAMSON</creatorcontrib><title>HARDWARE ACCELERATION FOR WWAN TECHNOLOGIES</title><description>Systems and methods for wireless communications are provided. These include data deciphering components, interrupt processing components, adaptive aggregations methods, optimized data path processing, buffer pool processing, application processing where data is formatted in a suitable format for a destination process, and Keystream bank processing among other hardware acceleration features. Such systems and methods are provided to simplify logic designs and mitigate processing steps during wireless network data processing.
Systèmes et procédés pour communications sans fil avec: composants de décryptage de données, composants de traitement d'interruption, procédés d'agrégation adaptative, traitement de chemins de données optimisés, traitement de pools de mémoire tampon, traitement d'application lorsque les données sont formatées selon un format convenable pour un processus de destination, traitement d'une banque de flux de clés, parmi d'autres éléments d'accélération de matériel: De tels systèmes et procédés permettent de simplifier les conceptions logiques et de limiter les opérations de traitement lors du traitement de données de réseau sans fil.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRICITY</subject><subject>JAMMING OF COMMUNICATION</subject><subject>PHYSICS</subject><subject>SECRET COMMUNICATION</subject><subject>TRANSMISSION</subject><subject>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2009</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZND2cAxyCXcMclVwdHZ29XENcgzx9PdTcPMPUggPd_RTCHF19vDz9_F393QN5mFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8eH-RgYGloampqbmBo5GxsSpAgAL2SXo</recordid><startdate>20091223</startdate><enddate>20091223</enddate><creator>LIOY, MARCELLO, V</creator><creator>TRAN, JEAN-MARIE QD</creator><creator>KUMAR, VANITHA, A</creator><creator>NARAYAN, SRIRAM</creator><creator>BABBAR, UPPINDER, S</creator><creator>KHAN, IRFAN, A</creator><creator>MIR, IDREAS</creator><creator>MAHESHWARI, SHAILESH</creator><creator>CHHABRA, GURVINDER, S</creator><creator>NAGPAL, VIKAS</creator><creator>KOHLENZ, MATHIAS</creator><creator>KLINGENBRUNN, THOMAS</creator><creator>JIM, SAMSON</creator><scope>EVB</scope></search><sort><creationdate>20091223</creationdate><title>HARDWARE ACCELERATION FOR WWAN TECHNOLOGIES</title><author>LIOY, MARCELLO, V ; TRAN, JEAN-MARIE QD ; KUMAR, VANITHA, A ; NARAYAN, SRIRAM ; BABBAR, UPPINDER, S ; KHAN, IRFAN, A ; MIR, IDREAS ; MAHESHWARI, SHAILESH ; CHHABRA, GURVINDER, S ; NAGPAL, VIKAS ; KOHLENZ, MATHIAS ; KLINGENBRUNN, THOMAS ; JIM, SAMSON</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_WO2009155570A23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre</language><creationdate>2009</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRICITY</topic><topic>JAMMING OF COMMUNICATION</topic><topic>PHYSICS</topic><topic>SECRET COMMUNICATION</topic><topic>TRANSMISSION</topic><topic>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</topic><toplevel>online_resources</toplevel><creatorcontrib>LIOY, MARCELLO, V</creatorcontrib><creatorcontrib>TRAN, JEAN-MARIE QD</creatorcontrib><creatorcontrib>KUMAR, VANITHA, A</creatorcontrib><creatorcontrib>NARAYAN, SRIRAM</creatorcontrib><creatorcontrib>BABBAR, UPPINDER, S</creatorcontrib><creatorcontrib>KHAN, IRFAN, A</creatorcontrib><creatorcontrib>MIR, IDREAS</creatorcontrib><creatorcontrib>MAHESHWARI, SHAILESH</creatorcontrib><creatorcontrib>CHHABRA, GURVINDER, S</creatorcontrib><creatorcontrib>NAGPAL, VIKAS</creatorcontrib><creatorcontrib>KOHLENZ, MATHIAS</creatorcontrib><creatorcontrib>KLINGENBRUNN, THOMAS</creatorcontrib><creatorcontrib>JIM, SAMSON</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LIOY, MARCELLO, V</au><au>TRAN, JEAN-MARIE QD</au><au>KUMAR, VANITHA, A</au><au>NARAYAN, SRIRAM</au><au>BABBAR, UPPINDER, S</au><au>KHAN, IRFAN, A</au><au>MIR, IDREAS</au><au>MAHESHWARI, SHAILESH</au><au>CHHABRA, GURVINDER, S</au><au>NAGPAL, VIKAS</au><au>KOHLENZ, MATHIAS</au><au>KLINGENBRUNN, THOMAS</au><au>JIM, SAMSON</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>HARDWARE ACCELERATION FOR WWAN TECHNOLOGIES</title><date>2009-12-23</date><risdate>2009</risdate><abstract>Systems and methods for wireless communications are provided. These include data deciphering components, interrupt processing components, adaptive aggregations methods, optimized data path processing, buffer pool processing, application processing where data is formatted in a suitable format for a destination process, and Keystream bank processing among other hardware acceleration features. Such systems and methods are provided to simplify logic designs and mitigate processing steps during wireless network data processing.
Systèmes et procédés pour communications sans fil avec: composants de décryptage de données, composants de traitement d'interruption, procédés d'agrégation adaptative, traitement de chemins de données optimisés, traitement de pools de mémoire tampon, traitement d'application lorsque les données sont formatées selon un format convenable pour un processus de destination, traitement d'une banque de flux de clés, parmi d'autres éléments d'accélération de matériel: De tels systèmes et procédés permettent de simplifier les conceptions logiques et de limiter les opérations de traitement lors du traitement de données de réseau sans fil.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng ; fre |
| recordid | cdi_epo_espacenet_WO2009155570A2 |
| source | esp@cenet |
| subjects | CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY JAMMING OF COMMUNICATION PHYSICS SECRET COMMUNICATION TRANSMISSION TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
| title | HARDWARE ACCELERATION FOR WWAN TECHNOLOGIES |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-10T14%3A34%3A53IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=LIOY,%20MARCELLO,%20V&rft.date=2009-12-23&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EWO2009155570A2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |