PROGRAMMABLE VIA MODELING

A method for verifying library components and designs on a via customizable ASIC, which may include the process of adding capacitors to model possible via sites of a model of an un-customized portion of or a whole ASIC, and replacing the capacitors with resistors to model where custom vias have been...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: LIEW, YIN, HAO, LIM, SOON, CHIEH, CHEK, WAI, LENG, KOK, YIT, PING, PARK, JONATHAN
Format: Patent
Sprache:eng ; fre
Schlagworte:
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