CHIP SCALE PACKAGE AND METHOD OF ASSEMBLING THE SAME

A method of producing a chip scale package is disclosed. The method includes dicing a wafer into a plurality of chip arrays, each array including two or more integrated circuit chips. The method further includes mounting each array on a substrate and dicing each array, attached to the substrate, int...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	KOLAN, RAVI KANTH, WANG, CHUEN KHIANG, TAN, HIEN BOON, CHONG, DESMOND YOK RUE, BIDIN, RAHAMAT, SUN, ANTHONY YI SHENG
Format:	Patent
Sprache:	eng ; fre
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!