CHIP SCALE PACKAGE AND METHOD OF ASSEMBLING THE SAME

A method of producing a chip scale package is disclosed. The method includes dicing a wafer into a plurality of chip arrays, each array including two or more integrated circuit chips. The method further includes mounting each array on a substrate and dicing each array, attached to the substrate, int...

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Hauptverfasser: KOLAN, RAVI KANTH, WANG, CHUEN KHIANG, TAN, HIEN BOON, CHONG, DESMOND YOK RUE, BIDIN, RAHAMAT, SUN, ANTHONY YI SHENG
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creator KOLAN, RAVI KANTH
WANG, CHUEN KHIANG
TAN, HIEN BOON
CHONG, DESMOND YOK RUE
BIDIN, RAHAMAT
SUN, ANTHONY YI SHENG
description A method of producing a chip scale package is disclosed. The method includes dicing a wafer into a plurality of chip arrays, each array including two or more integrated circuit chips. The method further includes mounting each array on a substrate and dicing each array, attached to the substrate, into individual chip scale packages, each individual chip scale package including only one integrated circuit chip. Procédé de fabrication d'un boîtier à l'échelle d'une puce. Ce procédé consiste à découper une tranche en plusieurs matrices de puce dont chacune comprend au moins deux puces à circuit intégré. Ledit procédé consiste également à monter chaque matrice sur un substrat et à découper chaque matrice, fixée au substrat, de manière à obtenir des boîtiers individuels à l'échelle d'une puce, chacun de ces boîtiers comprenant une seule puce à circuit intégré.
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title CHIP SCALE PACKAGE AND METHOD OF ASSEMBLING THE SAME
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