METHOD AND APPARATUS FOR WRITING DATA BETWEEN FAST AND SLOW CLOCK DOMAINS

A system for writing data efficiently between a fast clock domain and a slow clock domain. In one embodiment, a processor that performs firmware routines is clocked by a fast clock that is turned on when a prescribed event occurs to operate in the fast clock domain in conjunction with hardware that...

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser: HUELSKAMP, PAUL, J
Format: Patent
Sprache:eng ; fre
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