DEFERRED SHADING GRAPHICS PIPELINE PROCESSOR
Three-dimensional computer graphics system and methods and more particularly to structure and method for a three-dimensional graphics processor and having other enhanced graphics processing features. In one embodiment the graphics processor is a Deferred Shading Graphics Processor (DSGP) comprising...
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| creator | BRATT, JOSEPH, P CUAN, GEORGE HESSEL, RICHARD, E TUCK, NATHAN, D HSU, HENGWEI DULUK, JEROME, F., JR PAPAKIPOS, MATTHEW, N TRIVEDI, SUSHMA, S ARNOLD, VAUGHN, T NG, SAM REDGRAVE, JASON, R BENKUAL, JACK FANG, EMERSON, S GONG, ZHAOYU, G HO, THOMAS, Y DODGEN, STEVEN, L LI, SIDONG |
| description | Three-dimensional computer graphics system and methods and more particularly to structure and method for a three-dimensional graphics processor and having other enhanced graphics processing features. In one embodiment the graphics processor is a Deferred Shading Graphics Processor (DSGP) comprising an AGP interface, a command fetch and decode (2000), a geometry unit (3000), a mode extraction (4000) and polygon memory (5000), a sort unit (6000) and sort memory (7000), a setup unit (8000), a cull unit (9000), a mode injection (10000), a fragment unit (11000), a texture (12000) and texture memory (13000), a phong shading (14000), a pixel unit (15000), a backend unit (16000) coupled to a frame buffer (17000). Other embodiments need not include all of these functional units, and the structures and methods of these units are applicable to other computational processes and systems as well as deferred and non-deferred shading graphical processors.
A Deferred Shading Graphics Processor (DSGP) comprising an AGP interface, a command fetch and decode (2000), a geometry unit (3000), a mode extraction (4000) and polygon memory (5000), a sort unit (6000) and sort memory (7000), a set up unit (8000), a cull unit (9000), a mode injection (10000), a fragment unit (11000), a texture (12000) and texture memory (13000), a phong shading (14000), a pixel unit (15000), a backend unit (16000) coupled to a frame buffer (17000).
Un processeur graphique à ombrage reporté (DGSE) comprend une interface port graphique accéléré (AGA), une commande de récupération et de décodage (2000), une unité de géométrie (3000), une unité d'extraction (4000) de mode et une mémoire (5000) de polygones, une unité de tri (6000) et une mémoire (7000) de tri, une unité de base (8000), une unité de rebut (9000), une unité d'injection (10 000) de mode, une unité de fragmentation (11 000), une unité de texture (12 000) et une mémoire (13 000) de textures, un ombrage Phone (14 000), une unité de pixels (15 000), une unité système principal (16 000) couplée à une mémoire graphique (17 000). |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_WO0011607A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>WO0011607A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_WO0011607A13</originalsourceid><addsrcrecordid>eNrjZNBxcXVzDQpydVEI9nB08fRzV3APcgzw8HQOVgjwDHD18fRzVQgI8nd2DQ72D-JhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfHh_gYGhoZmBuaOhsZEKAEAVFck4Q</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>DEFERRED SHADING GRAPHICS PIPELINE PROCESSOR</title><source>esp@cenet</source><creator>BRATT, JOSEPH, P ; CUAN, GEORGE ; HESSEL, RICHARD, E ; TUCK, NATHAN, D ; HSU, HENGWEI ; DULUK, JEROME, F., JR ; PAPAKIPOS, MATTHEW, N ; TRIVEDI, SUSHMA, S ; ARNOLD, VAUGHN, T ; NG, SAM ; REDGRAVE, JASON, R ; BENKUAL, JACK ; FANG, EMERSON, S ; GONG, ZHAOYU, G ; HO, THOMAS, Y ; DODGEN, STEVEN, L ; LI, SIDONG</creator><creatorcontrib>BRATT, JOSEPH, P ; CUAN, GEORGE ; HESSEL, RICHARD, E ; TUCK, NATHAN, D ; HSU, HENGWEI ; DULUK, JEROME, F., JR ; PAPAKIPOS, MATTHEW, N ; TRIVEDI, SUSHMA, S ; ARNOLD, VAUGHN, T ; NG, SAM ; REDGRAVE, JASON, R ; BENKUAL, JACK ; FANG, EMERSON, S ; GONG, ZHAOYU, G ; HO, THOMAS, Y ; DODGEN, STEVEN, L ; LI, SIDONG</creatorcontrib><description>Three-dimensional computer graphics system and methods and more particularly to structure and method for a three-dimensional graphics processor and having other enhanced graphics processing features. In one embodiment the graphics processor is a Deferred Shading Graphics Processor (DSGP) comprising an AGP interface, a command fetch and decode (2000), a geometry unit (3000), a mode extraction (4000) and polygon memory (5000), a sort unit (6000) and sort memory (7000), a setup unit (8000), a cull unit (9000), a mode injection (10000), a fragment unit (11000), a texture (12000) and texture memory (13000), a phong shading (14000), a pixel unit (15000), a backend unit (16000) coupled to a frame buffer (17000). Other embodiments need not include all of these functional units, and the structures and methods of these units are applicable to other computational processes and systems as well as deferred and non-deferred shading graphical processors.
A Deferred Shading Graphics Processor (DSGP) comprising an AGP interface, a command fetch and decode (2000), a geometry unit (3000), a mode extraction (4000) and polygon memory (5000), a sort unit (6000) and sort memory (7000), a set up unit (8000), a cull unit (9000), a mode injection (10000), a fragment unit (11000), a texture (12000) and texture memory (13000), a phong shading (14000), a pixel unit (15000), a backend unit (16000) coupled to a frame buffer (17000).
Un processeur graphique à ombrage reporté (DGSE) comprend une interface port graphique accéléré (AGA), une commande de récupération et de décodage (2000), une unité de géométrie (3000), une unité d'extraction (4000) de mode et une mémoire (5000) de polygones, une unité de tri (6000) et une mémoire (7000) de tri, une unité de base (8000), une unité de rebut (9000), une unité d'injection (10 000) de mode, une unité de fragmentation (11 000), une unité de texture (12 000) et une mémoire (13 000) de textures, un ombrage Phone (14 000), une unité de pixels (15 000), une unité système principal (16 000) couplée à une mémoire graphique (17 000).</description><edition>7</edition><language>eng ; fre</language><subject>CALCULATING ; COMPUTING ; COUNTING ; IMAGE DATA PROCESSING OR GENERATION, IN GENERAL ; PHYSICS</subject><creationdate>2000</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20000302&DB=EPODOC&CC=WO&NR=0011607A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20000302&DB=EPODOC&CC=WO&NR=0011607A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>BRATT, JOSEPH, P</creatorcontrib><creatorcontrib>CUAN, GEORGE</creatorcontrib><creatorcontrib>HESSEL, RICHARD, E</creatorcontrib><creatorcontrib>TUCK, NATHAN, D</creatorcontrib><creatorcontrib>HSU, HENGWEI</creatorcontrib><creatorcontrib>DULUK, JEROME, F., JR</creatorcontrib><creatorcontrib>PAPAKIPOS, MATTHEW, N</creatorcontrib><creatorcontrib>TRIVEDI, SUSHMA, S</creatorcontrib><creatorcontrib>ARNOLD, VAUGHN, T</creatorcontrib><creatorcontrib>NG, SAM</creatorcontrib><creatorcontrib>REDGRAVE, JASON, R</creatorcontrib><creatorcontrib>BENKUAL, JACK</creatorcontrib><creatorcontrib>FANG, EMERSON, S</creatorcontrib><creatorcontrib>GONG, ZHAOYU, G</creatorcontrib><creatorcontrib>HO, THOMAS, Y</creatorcontrib><creatorcontrib>DODGEN, STEVEN, L</creatorcontrib><creatorcontrib>LI, SIDONG</creatorcontrib><title>DEFERRED SHADING GRAPHICS PIPELINE PROCESSOR</title><description>Three-dimensional computer graphics system and methods and more particularly to structure and method for a three-dimensional graphics processor and having other enhanced graphics processing features. In one embodiment the graphics processor is a Deferred Shading Graphics Processor (DSGP) comprising an AGP interface, a command fetch and decode (2000), a geometry unit (3000), a mode extraction (4000) and polygon memory (5000), a sort unit (6000) and sort memory (7000), a setup unit (8000), a cull unit (9000), a mode injection (10000), a fragment unit (11000), a texture (12000) and texture memory (13000), a phong shading (14000), a pixel unit (15000), a backend unit (16000) coupled to a frame buffer (17000). Other embodiments need not include all of these functional units, and the structures and methods of these units are applicable to other computational processes and systems as well as deferred and non-deferred shading graphical processors.
A Deferred Shading Graphics Processor (DSGP) comprising an AGP interface, a command fetch and decode (2000), a geometry unit (3000), a mode extraction (4000) and polygon memory (5000), a sort unit (6000) and sort memory (7000), a set up unit (8000), a cull unit (9000), a mode injection (10000), a fragment unit (11000), a texture (12000) and texture memory (13000), a phong shading (14000), a pixel unit (15000), a backend unit (16000) coupled to a frame buffer (17000).
Un processeur graphique à ombrage reporté (DGSE) comprend une interface port graphique accéléré (AGA), une commande de récupération et de décodage (2000), une unité de géométrie (3000), une unité d'extraction (4000) de mode et une mémoire (5000) de polygones, une unité de tri (6000) et une mémoire (7000) de tri, une unité de base (8000), une unité de rebut (9000), une unité d'injection (10 000) de mode, une unité de fragmentation (11 000), une unité de texture (12 000) et une mémoire (13 000) de textures, un ombrage Phone (14 000), une unité de pixels (15 000), une unité système principal (16 000) couplée à une mémoire graphique (17 000).</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>IMAGE DATA PROCESSING OR GENERATION, IN GENERAL</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2000</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNBxcXVzDQpydVEI9nB08fRzV3APcgzw8HQOVgjwDHD18fRzVQgI8nd2DQ72D-JhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfHh_gYGhoZmBuaOhsZEKAEAVFck4Q</recordid><startdate>20000302</startdate><enddate>20000302</enddate><creator>BRATT, JOSEPH, P</creator><creator>CUAN, GEORGE</creator><creator>HESSEL, RICHARD, E</creator><creator>TUCK, NATHAN, D</creator><creator>HSU, HENGWEI</creator><creator>DULUK, JEROME, F., JR</creator><creator>PAPAKIPOS, MATTHEW, N</creator><creator>TRIVEDI, SUSHMA, S</creator><creator>ARNOLD, VAUGHN, T</creator><creator>NG, SAM</creator><creator>REDGRAVE, JASON, R</creator><creator>BENKUAL, JACK</creator><creator>FANG, EMERSON, S</creator><creator>GONG, ZHAOYU, G</creator><creator>HO, THOMAS, Y</creator><creator>DODGEN, STEVEN, L</creator><creator>LI, SIDONG</creator><scope>EVB</scope></search><sort><creationdate>20000302</creationdate><title>DEFERRED SHADING GRAPHICS PIPELINE PROCESSOR</title><author>BRATT, JOSEPH, P ; CUAN, GEORGE ; HESSEL, RICHARD, E ; TUCK, NATHAN, D ; HSU, HENGWEI ; DULUK, JEROME, F., JR ; PAPAKIPOS, MATTHEW, N ; TRIVEDI, SUSHMA, S ; ARNOLD, VAUGHN, T ; NG, SAM ; REDGRAVE, JASON, R ; BENKUAL, JACK ; FANG, EMERSON, S ; GONG, ZHAOYU, G ; HO, THOMAS, Y ; DODGEN, STEVEN, L ; LI, SIDONG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_WO0011607A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre</language><creationdate>2000</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>IMAGE DATA PROCESSING OR GENERATION, IN GENERAL</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>BRATT, JOSEPH, P</creatorcontrib><creatorcontrib>CUAN, GEORGE</creatorcontrib><creatorcontrib>HESSEL, RICHARD, E</creatorcontrib><creatorcontrib>TUCK, NATHAN, D</creatorcontrib><creatorcontrib>HSU, HENGWEI</creatorcontrib><creatorcontrib>DULUK, JEROME, F., JR</creatorcontrib><creatorcontrib>PAPAKIPOS, MATTHEW, N</creatorcontrib><creatorcontrib>TRIVEDI, SUSHMA, S</creatorcontrib><creatorcontrib>ARNOLD, VAUGHN, T</creatorcontrib><creatorcontrib>NG, SAM</creatorcontrib><creatorcontrib>REDGRAVE, JASON, R</creatorcontrib><creatorcontrib>BENKUAL, JACK</creatorcontrib><creatorcontrib>FANG, EMERSON, S</creatorcontrib><creatorcontrib>GONG, ZHAOYU, G</creatorcontrib><creatorcontrib>HO, THOMAS, Y</creatorcontrib><creatorcontrib>DODGEN, STEVEN, L</creatorcontrib><creatorcontrib>LI, SIDONG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>BRATT, JOSEPH, P</au><au>CUAN, GEORGE</au><au>HESSEL, RICHARD, E</au><au>TUCK, NATHAN, D</au><au>HSU, HENGWEI</au><au>DULUK, JEROME, F., JR</au><au>PAPAKIPOS, MATTHEW, N</au><au>TRIVEDI, SUSHMA, S</au><au>ARNOLD, VAUGHN, T</au><au>NG, SAM</au><au>REDGRAVE, JASON, R</au><au>BENKUAL, JACK</au><au>FANG, EMERSON, S</au><au>GONG, ZHAOYU, G</au><au>HO, THOMAS, Y</au><au>DODGEN, STEVEN, L</au><au>LI, SIDONG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>DEFERRED SHADING GRAPHICS PIPELINE PROCESSOR</title><date>2000-03-02</date><risdate>2000</risdate><abstract>Three-dimensional computer graphics system and methods and more particularly to structure and method for a three-dimensional graphics processor and having other enhanced graphics processing features. In one embodiment the graphics processor is a Deferred Shading Graphics Processor (DSGP) comprising an AGP interface, a command fetch and decode (2000), a geometry unit (3000), a mode extraction (4000) and polygon memory (5000), a sort unit (6000) and sort memory (7000), a setup unit (8000), a cull unit (9000), a mode injection (10000), a fragment unit (11000), a texture (12000) and texture memory (13000), a phong shading (14000), a pixel unit (15000), a backend unit (16000) coupled to a frame buffer (17000). Other embodiments need not include all of these functional units, and the structures and methods of these units are applicable to other computational processes and systems as well as deferred and non-deferred shading graphical processors.
A Deferred Shading Graphics Processor (DSGP) comprising an AGP interface, a command fetch and decode (2000), a geometry unit (3000), a mode extraction (4000) and polygon memory (5000), a sort unit (6000) and sort memory (7000), a set up unit (8000), a cull unit (9000), a mode injection (10000), a fragment unit (11000), a texture (12000) and texture memory (13000), a phong shading (14000), a pixel unit (15000), a backend unit (16000) coupled to a frame buffer (17000).
Un processeur graphique à ombrage reporté (DGSE) comprend une interface port graphique accéléré (AGA), une commande de récupération et de décodage (2000), une unité de géométrie (3000), une unité d'extraction (4000) de mode et une mémoire (5000) de polygones, une unité de tri (6000) et une mémoire (7000) de tri, une unité de base (8000), une unité de rebut (9000), une unité d'injection (10 000) de mode, une unité de fragmentation (11 000), une unité de texture (12 000) et une mémoire (13 000) de textures, un ombrage Phone (14 000), une unité de pixels (15 000), une unité système principal (16 000) couplée à une mémoire graphique (17 000).</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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| subjects | CALCULATING COMPUTING COUNTING IMAGE DATA PROCESSING OR GENERATION, IN GENERAL PHYSICS |
| title | DEFERRED SHADING GRAPHICS PIPELINE PROCESSOR |
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