Dual deterministic and stochastic neurosynaptic core circuit
One embodiment provides a system comprising a memory device for maintaining deterministic neural data relating to a digital neuron and a logic circuit for deterministic neural computation and stochastic neural computation. Deterministic neural computation comprises processing a neuronal state of the...
Gespeichert in:
| Hauptverfasser: | , , , , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | Sawada, Jun Cassidy, Andrew S Jackson, Bryan L Alvarez-Icaza, Rodrigo Merolla, Paul A Arthur, John V Modha, Dharmendra S |
| description | One embodiment provides a system comprising a memory device for maintaining deterministic neural data relating to a digital neuron and a logic circuit for deterministic neural computation and stochastic neural computation. Deterministic neural computation comprises processing a neuronal state of the neuron based on the deterministic neural data maintained. Stochastic neural computation comprises generating stochastic neural data relating to the neuron and processing the neuronal state of the neuron based on the stochastic neural data generated. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9984324B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9984324B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9984324B23</originalsourceid><addsrcrecordid>eNrjZLBxKU3MUUhJLUktys3MyywuyUxWSMxLUSguyU_OSARz81JLi_KLK_MSC0C85PyiVIXkzKLk0swSHgbWtMSc4lReKM3NoODmGuLsoZtakB-fWlyQmJyal1oSHxpsaWlhYmxk4mRkTIQSANv8MFU</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Dual deterministic and stochastic neurosynaptic core circuit</title><source>esp@cenet</source><creator>Sawada, Jun ; Cassidy, Andrew S ; Jackson, Bryan L ; Alvarez-Icaza, Rodrigo ; Merolla, Paul A ; Arthur, John V ; Modha, Dharmendra S</creator><creatorcontrib>Sawada, Jun ; Cassidy, Andrew S ; Jackson, Bryan L ; Alvarez-Icaza, Rodrigo ; Merolla, Paul A ; Arthur, John V ; Modha, Dharmendra S</creatorcontrib><description>One embodiment provides a system comprising a memory device for maintaining deterministic neural data relating to a digital neuron and a logic circuit for deterministic neural computation and stochastic neural computation. Deterministic neural computation comprises processing a neuronal state of the neuron based on the deterministic neural data maintained. Stochastic neural computation comprises generating stochastic neural data relating to the neuron and processing the neuronal state of the neuron based on the stochastic neural data generated.</description><language>eng</language><subject>CALCULATING ; COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS ; COMPUTING ; COUNTING ; PHYSICS</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180529&DB=EPODOC&CC=US&NR=9984324B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180529&DB=EPODOC&CC=US&NR=9984324B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Sawada, Jun</creatorcontrib><creatorcontrib>Cassidy, Andrew S</creatorcontrib><creatorcontrib>Jackson, Bryan L</creatorcontrib><creatorcontrib>Alvarez-Icaza, Rodrigo</creatorcontrib><creatorcontrib>Merolla, Paul A</creatorcontrib><creatorcontrib>Arthur, John V</creatorcontrib><creatorcontrib>Modha, Dharmendra S</creatorcontrib><title>Dual deterministic and stochastic neurosynaptic core circuit</title><description>One embodiment provides a system comprising a memory device for maintaining deterministic neural data relating to a digital neuron and a logic circuit for deterministic neural computation and stochastic neural computation. Deterministic neural computation comprises processing a neuronal state of the neuron based on the deterministic neural data maintained. Stochastic neural computation comprises generating stochastic neural data relating to the neuron and processing the neuronal state of the neuron based on the stochastic neural data generated.</description><subject>CALCULATING</subject><subject>COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLBxKU3MUUhJLUktys3MyywuyUxWSMxLUSguyU_OSARz81JLi_KLK_MSC0C85PyiVIXkzKLk0swSHgbWtMSc4lReKM3NoODmGuLsoZtakB-fWlyQmJyal1oSHxpsaWlhYmxk4mRkTIQSANv8MFU</recordid><startdate>20180529</startdate><enddate>20180529</enddate><creator>Sawada, Jun</creator><creator>Cassidy, Andrew S</creator><creator>Jackson, Bryan L</creator><creator>Alvarez-Icaza, Rodrigo</creator><creator>Merolla, Paul A</creator><creator>Arthur, John V</creator><creator>Modha, Dharmendra S</creator><scope>EVB</scope></search><sort><creationdate>20180529</creationdate><title>Dual deterministic and stochastic neurosynaptic core circuit</title><author>Sawada, Jun ; Cassidy, Andrew S ; Jackson, Bryan L ; Alvarez-Icaza, Rodrigo ; Merolla, Paul A ; Arthur, John V ; Modha, Dharmendra S</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9984324B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2018</creationdate><topic>CALCULATING</topic><topic>COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Sawada, Jun</creatorcontrib><creatorcontrib>Cassidy, Andrew S</creatorcontrib><creatorcontrib>Jackson, Bryan L</creatorcontrib><creatorcontrib>Alvarez-Icaza, Rodrigo</creatorcontrib><creatorcontrib>Merolla, Paul A</creatorcontrib><creatorcontrib>Arthur, John V</creatorcontrib><creatorcontrib>Modha, Dharmendra S</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Sawada, Jun</au><au>Cassidy, Andrew S</au><au>Jackson, Bryan L</au><au>Alvarez-Icaza, Rodrigo</au><au>Merolla, Paul A</au><au>Arthur, John V</au><au>Modha, Dharmendra S</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Dual deterministic and stochastic neurosynaptic core circuit</title><date>2018-05-29</date><risdate>2018</risdate><abstract>One embodiment provides a system comprising a memory device for maintaining deterministic neural data relating to a digital neuron and a logic circuit for deterministic neural computation and stochastic neural computation. Deterministic neural computation comprises processing a neuronal state of the neuron based on the deterministic neural data maintained. Stochastic neural computation comprises generating stochastic neural data relating to the neuron and processing the neuronal state of the neuron based on the stochastic neural data generated.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US9984324B2 |
| source | esp@cenet |
| subjects | CALCULATING COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS COMPUTING COUNTING PHYSICS |
| title | Dual deterministic and stochastic neurosynaptic core circuit |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-31T15%3A52%3A06IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Sawada,%20Jun&rft.date=2018-05-29&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS9984324B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |