Three-dimensional semiconductor device

Three-dimensional semiconductor device

A semiconductor device includes a substrate including a cell region and a connection region. A stack is disposed on the substrate. A vertical channel structure penetrates the stack in the cell region. The stack includes electrode patterns and insulating patterns which are alternatingly and repeatedl...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Kwon, Oik, Kim, Jeongsoo, Park, Jinwoo, Chung, Seungpil, Park, Joyoung, Kwon, Yong-Hyun, Lee, Seok-Won
Format: Patent
Sprache:eng
Schlagworte:
ELECTRICITY
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Kwon, Oik
Kim, Jeongsoo
Park, Jinwoo
Chung, Seungpil
Park, Joyoung
Kwon, Yong-Hyun
Lee, Seok-Won
description A semiconductor device includes a substrate including a cell region and a connection region. A stack is disposed on the substrate. A vertical channel structure penetrates the stack in the cell region. The stack includes electrode patterns and insulating patterns which are alternatingly and repeatedly stacked on the substrate. Each of the electrode patterns may extend in a first direction and include a pad portion. The pad portion is positioned in the connection region. The pad portion includes a first sidewall and a second sidewall that extend in the first direction on opposite sides of the pad portion. The first sidewall has a recessed portion that is recessed in a second direction crossing the first direction toward the second sidewall.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9947684B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9947684B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9947684B23</originalsourceid><addsrcrecordid>eNrjZFALyShKTdVNycxNzSvOzM9LzFEoTs3NTM7PSylNLskvUkhJLctMTuVhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGhwZaWJuZmFiZORsZEKAEAWDUn5A</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Three-dimensional semiconductor device</title><source>esp@cenet</source><creator>Kwon, Oik ; Kim, Jeongsoo ; Park, Jinwoo ; Chung, Seungpil ; Park, Joyoung ; Kwon, Yong-Hyun ; Lee, Seok-Won</creator><creatorcontrib>Kwon, Oik ; Kim, Jeongsoo ; Park, Jinwoo ; Chung, Seungpil ; Park, Joyoung ; Kwon, Yong-Hyun ; Lee, Seok-Won</creatorcontrib><description>A semiconductor device includes a substrate including a cell region and a connection region. A stack is disposed on the substrate. A vertical channel structure penetrates the stack in the cell region. The stack includes electrode patterns and insulating patterns which are alternatingly and repeatedly stacked on the substrate. Each of the electrode patterns may extend in a first direction and include a pad portion. The pad portion is positioned in the connection region. The pad portion includes a first sidewall and a second sidewall that extend in the first direction on opposite sides of the pad portion. The first sidewall has a recessed portion that is recessed in a second direction crossing the first direction toward the second sidewall.</description><language>eng</language><subject>ELECTRICITY</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20180417&amp;DB=EPODOC&amp;CC=US&amp;NR=9947684B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20180417&amp;DB=EPODOC&amp;CC=US&amp;NR=9947684B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Kwon, Oik</creatorcontrib><creatorcontrib>Kim, Jeongsoo</creatorcontrib><creatorcontrib>Park, Jinwoo</creatorcontrib><creatorcontrib>Chung, Seungpil</creatorcontrib><creatorcontrib>Park, Joyoung</creatorcontrib><creatorcontrib>Kwon, Yong-Hyun</creatorcontrib><creatorcontrib>Lee, Seok-Won</creatorcontrib><title>Three-dimensional semiconductor device</title><description>A semiconductor device includes a substrate including a cell region and a connection region. A stack is disposed on the substrate. A vertical channel structure penetrates the stack in the cell region. The stack includes electrode patterns and insulating patterns which are alternatingly and repeatedly stacked on the substrate. Each of the electrode patterns may extend in a first direction and include a pad portion. The pad portion is positioned in the connection region. The pad portion includes a first sidewall and a second sidewall that extend in the first direction on opposite sides of the pad portion. The first sidewall has a recessed portion that is recessed in a second direction crossing the first direction toward the second sidewall.</description><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFALyShKTdVNycxNzSvOzM9LzFEoTs3NTM7PSylNLskvUkhJLctMTuVhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGhwZaWJuZmFiZORsZEKAEAWDUn5A</recordid><startdate>20180417</startdate><enddate>20180417</enddate><creator>Kwon, Oik</creator><creator>Kim, Jeongsoo</creator><creator>Park, Jinwoo</creator><creator>Chung, Seungpil</creator><creator>Park, Joyoung</creator><creator>Kwon, Yong-Hyun</creator><creator>Lee, Seok-Won</creator><scope>EVB</scope></search><sort><creationdate>20180417</creationdate><title>Three-dimensional semiconductor device</title><author>Kwon, Oik ; Kim, Jeongsoo ; Park, Jinwoo ; Chung, Seungpil ; Park, Joyoung ; Kwon, Yong-Hyun ; Lee, Seok-Won</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9947684B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2018</creationdate><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>Kwon, Oik</creatorcontrib><creatorcontrib>Kim, Jeongsoo</creatorcontrib><creatorcontrib>Park, Jinwoo</creatorcontrib><creatorcontrib>Chung, Seungpil</creatorcontrib><creatorcontrib>Park, Joyoung</creatorcontrib><creatorcontrib>Kwon, Yong-Hyun</creatorcontrib><creatorcontrib>Lee, Seok-Won</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kwon, Oik</au><au>Kim, Jeongsoo</au><au>Park, Jinwoo</au><au>Chung, Seungpil</au><au>Park, Joyoung</au><au>Kwon, Yong-Hyun</au><au>Lee, Seok-Won</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Three-dimensional semiconductor device</title><date>2018-04-17</date><risdate>2018</risdate><abstract>A semiconductor device includes a substrate including a cell region and a connection region. A stack is disposed on the substrate. A vertical channel structure penetrates the stack in the cell region. The stack includes electrode patterns and insulating patterns which are alternatingly and repeatedly stacked on the substrate. Each of the electrode patterns may extend in a first direction and include a pad portion. The pad portion is positioned in the connection region. The pad portion includes a first sidewall and a second sidewall that extend in the first direction on opposite sides of the pad portion. The first sidewall has a recessed portion that is recessed in a second direction crossing the first direction toward the second sidewall.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US9947684B2
source esp@cenet
subjects ELECTRICITY
title Three-dimensional semiconductor device
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-17T17%3A43%3A02IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Kwon,%20Oik&rft.date=2018-04-17&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS9947684B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true