On-chip test interface for voltage-mode Mach-Zehnder modulator driver
An apparatus comprising a semiconductor chip that comprises an optical modulator configured to modulate an optical signal based on a received driver signal, a voltage-mode (VM) driver coupled to the optical modulator and configured to produce a level-shifted driver signal to modulate the optical sig...
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creator | Dang Yen Duan Yan Gu Liang Lei Gong Deshpande Mamatha Gu Yifan Lee Hungyi Shih Shou-Po Cao Yuming |
description | An apparatus comprising a semiconductor chip that comprises an optical modulator configured to modulate an optical signal based on a received driver signal, a voltage-mode (VM) driver coupled to the optical modulator and configured to produce a level-shifted driver signal to modulate the optical signal, and a two-stage test interface coupled to the optical modulator and configured to receive and test the level shifted driver signal. The two-stage test interface comprises a voltage equalization stage coupled to an output-terminated buffer stage, the VM driver comprises a two-stage VM Mach-Zehnder modulator (MZM) driver that comprises a pre-driver coupled to a VM level-shifter (VMLS). The apparatus further comprises a resistor coupled to an output of the buffer stage, wherein the resistor comprises an amount of resistance that matches a termination resistance of a test equipment. The termination resistance is about 50 ohm (Ω). |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9941958B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9941958B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9941958B23</originalsourceid><addsrcrecordid>eNrjZHD1z9NNzsgsUChJLS5RyMwrSS1KS0xOVUjLL1Ioy88pSUxP1c3NT0lV8E1MztCNSs3IS0ktUgCKlOYklgDVpBRllqUW8TCwpiXmFKfyQmluBgU31xBnD93Ugvz41OICoIl5qSXxocGWliaGlqYWTkbGRCgBAG3wMts</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>On-chip test interface for voltage-mode Mach-Zehnder modulator driver</title><source>esp@cenet</source><creator>Dang Yen ; Duan Yan ; Gu Liang ; Lei Gong ; Deshpande Mamatha ; Gu Yifan ; Lee Hungyi ; Shih Shou-Po ; Cao Yuming</creator><creatorcontrib>Dang Yen ; Duan Yan ; Gu Liang ; Lei Gong ; Deshpande Mamatha ; Gu Yifan ; Lee Hungyi ; Shih Shou-Po ; Cao Yuming</creatorcontrib><description>An apparatus comprising a semiconductor chip that comprises an optical modulator configured to modulate an optical signal based on a received driver signal, a voltage-mode (VM) driver coupled to the optical modulator and configured to produce a level-shifted driver signal to modulate the optical signal, and a two-stage test interface coupled to the optical modulator and configured to receive and test the level shifted driver signal. The two-stage test interface comprises a voltage equalization stage coupled to an output-terminated buffer stage, the VM driver comprises a two-stage VM Mach-Zehnder modulator (MZM) driver that comprises a pre-driver coupled to a VM level-shifter (VMLS). The apparatus further comprises a resistor coupled to an output of the buffer stage, wherein the resistor comprises an amount of resistance that matches a termination resistance of a test equipment. The termination resistance is about 50 ohm (Ω).</description><language>eng</language><subject>ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRICITY ; TRANSMISSION ; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180410&DB=EPODOC&CC=US&NR=9941958B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,782,887,25573,76557</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180410&DB=EPODOC&CC=US&NR=9941958B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Dang Yen</creatorcontrib><creatorcontrib>Duan Yan</creatorcontrib><creatorcontrib>Gu Liang</creatorcontrib><creatorcontrib>Lei Gong</creatorcontrib><creatorcontrib>Deshpande Mamatha</creatorcontrib><creatorcontrib>Gu Yifan</creatorcontrib><creatorcontrib>Lee Hungyi</creatorcontrib><creatorcontrib>Shih Shou-Po</creatorcontrib><creatorcontrib>Cao Yuming</creatorcontrib><title>On-chip test interface for voltage-mode Mach-Zehnder modulator driver</title><description>An apparatus comprising a semiconductor chip that comprises an optical modulator configured to modulate an optical signal based on a received driver signal, a voltage-mode (VM) driver coupled to the optical modulator and configured to produce a level-shifted driver signal to modulate the optical signal, and a two-stage test interface coupled to the optical modulator and configured to receive and test the level shifted driver signal. The two-stage test interface comprises a voltage equalization stage coupled to an output-terminated buffer stage, the VM driver comprises a two-stage VM Mach-Zehnder modulator (MZM) driver that comprises a pre-driver coupled to a VM level-shifter (VMLS). The apparatus further comprises a resistor coupled to an output of the buffer stage, wherein the resistor comprises an amount of resistance that matches a termination resistance of a test equipment. The termination resistance is about 50 ohm (Ω).</description><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRICITY</subject><subject>TRANSMISSION</subject><subject>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHD1z9NNzsgsUChJLS5RyMwrSS1KS0xOVUjLL1Ioy88pSUxP1c3NT0lV8E1MztCNSs3IS0ktUgCKlOYklgDVpBRllqUW8TCwpiXmFKfyQmluBgU31xBnD93Ugvz41OICoIl5qSXxocGWliaGlqYWTkbGRCgBAG3wMts</recordid><startdate>20180410</startdate><enddate>20180410</enddate><creator>Dang Yen</creator><creator>Duan Yan</creator><creator>Gu Liang</creator><creator>Lei Gong</creator><creator>Deshpande Mamatha</creator><creator>Gu Yifan</creator><creator>Lee Hungyi</creator><creator>Shih Shou-Po</creator><creator>Cao Yuming</creator><scope>EVB</scope></search><sort><creationdate>20180410</creationdate><title>On-chip test interface for voltage-mode Mach-Zehnder modulator driver</title><author>Dang Yen ; Duan Yan ; Gu Liang ; Lei Gong ; Deshpande Mamatha ; Gu Yifan ; Lee Hungyi ; Shih Shou-Po ; Cao Yuming</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9941958B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2018</creationdate><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRICITY</topic><topic>TRANSMISSION</topic><topic>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</topic><toplevel>online_resources</toplevel><creatorcontrib>Dang Yen</creatorcontrib><creatorcontrib>Duan Yan</creatorcontrib><creatorcontrib>Gu Liang</creatorcontrib><creatorcontrib>Lei Gong</creatorcontrib><creatorcontrib>Deshpande Mamatha</creatorcontrib><creatorcontrib>Gu Yifan</creatorcontrib><creatorcontrib>Lee Hungyi</creatorcontrib><creatorcontrib>Shih Shou-Po</creatorcontrib><creatorcontrib>Cao Yuming</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Dang Yen</au><au>Duan Yan</au><au>Gu Liang</au><au>Lei Gong</au><au>Deshpande Mamatha</au><au>Gu Yifan</au><au>Lee Hungyi</au><au>Shih Shou-Po</au><au>Cao Yuming</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>On-chip test interface for voltage-mode Mach-Zehnder modulator driver</title><date>2018-04-10</date><risdate>2018</risdate><abstract>An apparatus comprising a semiconductor chip that comprises an optical modulator configured to modulate an optical signal based on a received driver signal, a voltage-mode (VM) driver coupled to the optical modulator and configured to produce a level-shifted driver signal to modulate the optical signal, and a two-stage test interface coupled to the optical modulator and configured to receive and test the level shifted driver signal. The two-stage test interface comprises a voltage equalization stage coupled to an output-terminated buffer stage, the VM driver comprises a two-stage VM Mach-Zehnder modulator (MZM) driver that comprises a pre-driver coupled to a VM level-shifter (VMLS). The apparatus further comprises a resistor coupled to an output of the buffer stage, wherein the resistor comprises an amount of resistance that matches a termination resistance of a test equipment. The termination resistance is about 50 ohm (Ω).</abstract><oa>free_for_read</oa></addata></record> |
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subjects | ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY TRANSMISSION TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
title | On-chip test interface for voltage-mode Mach-Zehnder modulator driver |
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