Semiconductor structure with enhanced withstand voltage

A semiconductor structure including a substrate, a buffer layer, a superlattice formed on the buffer layer, the superlattice including a pattern including n layers made of different materials, n being at least equal to 2, each layer including an AlxGayInwBzN type material where x+y+w+z=1, the thickn...

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Hauptverfasser:	Charles Matthew, Bavard Alexis
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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creator	Charles Matthew Bavard Alexis
description	A semiconductor structure including a substrate, a buffer layer, a superlattice formed on the buffer layer, the superlattice including a pattern including n layers made of different materials, n being at least equal to 2, each layer including an AlxGayInwBzN type material where x+y+w+z=1, the thickness of each layer being less than the critical thickness thereof, the number of patterns being at least equal to 50, an insert layer wherein the material has a first lattice parameter, a layer of GaN material, wherein the lattice parameter is greater than the first lattice parameter such that the layer of GaN material is compressed by the insert layer.
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Bavard Alexis</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9923061B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2018</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Charles Matthew</creatorcontrib><creatorcontrib>Bavard Alexis</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Charles Matthew</au><au>Bavard Alexis</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor structure with enhanced withstand voltage</title><date>2018-03-20</date><risdate>2018</risdate><abstract>A semiconductor structure including a substrate, a buffer layer, a superlattice formed on the buffer layer, the superlattice including a pattern including n layers made of different materials, n being at least equal to 2, each layer including an AlxGayInwBzN type material where x+y+w+z=1, the thickness of each layer being less than the critical thickness thereof, the number of patterns being at least equal to 50, an insert layer wherein the material has a first lattice parameter, a layer of GaN material, wherein the lattice parameter is greater than the first lattice parameter such that the layer of GaN material is compressed by the insert layer.</abstract><oa>free_for_read</oa></addata></record>
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title	Semiconductor structure with enhanced withstand voltage
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