Cryptographic processing device having a non-volatile memory including memory cells in an initial or a variable state

A cryptographic processing device comprises a cipher control circuit operative to execute at least one of encryption of plaintext data and decryption of ciphertext data on the basis of conversion parameter data; and a memory cell array that includes a plurality of memory cells, the plurality of memo...

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Bibliographische Detailangaben
Hauptverfasser: Inoue Shinji, Maeda Takuji, Suto Masato, Katoh Yoshikazu
Format: Patent
Sprache:eng
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