Apparatus and method for reducing leakage power of a circuit
Described is a processor comprising: a plurality of transistors operable to provide dynamically adjustable transistor size, the plurality of transistors coupled at one end to a first power supply and coupled at another end to a second power supply; a circuit coupled to the second power supply, the s...
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| creator | Prasad Sankalan Natarajan Narayanan Thomas Tessil Kandula Phani Kumar Ranade Mandar R Shamanna Gururaj K Rusu Stefan |
| description | Described is a processor comprising: a plurality of transistors operable to provide dynamically adjustable transistor size, the plurality of transistors coupled at one end to a first power supply and coupled at another end to a second power supply; a circuit coupled to the second power supply, the second power supply to provide power to the circuit; and a power control unit (PCU) to monitor the level of the first power supply, and to dynamically adjust the transistor size of the plurality of transistors so that the second power supply is adjusted to keep the circuit operational. |
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| subjects | CALCULATING COMPUTING CONTROLLING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS REGULATING SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES |
| title | Apparatus and method for reducing leakage power of a circuit |
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