Method for optimizing management of standby of a microprocessor enabling the implementation of several logical cores and computer program implementing such a method

The subject of the invention is in particular the optimization of standby management of a part of a microprocessor allowing implementation of at least two logic cores, said at least one microprocessor comprising means for placing at least one resource non common to said at least two logic cores on s...

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Bibliographische Detailangaben
Hauptverfasser: Welterlen Benoit, Wellenreiter Francois, Bru Xavier
Format: Patent
Sprache:eng
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