Conductors, making method of the same, and electronic devices including the same
A conductor includes a substrate, a first conductive layer disposed on the substrate and including two or more islands including graphene, and a second conductive layer disposed on the first conductive layer and including a conductive metal nanowire, wherein at least one of an upper surface and a lo...
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| creator | Kim Mi Jeong Cho Youngjin Sohn Hiesang Park Hyeon Cheol Kwak Chan Shin Weonho |
| description | A conductor includes a substrate, a first conductive layer disposed on the substrate and including two or more islands including graphene, and a second conductive layer disposed on the first conductive layer and including a conductive metal nanowire, wherein at least one of an upper surface and a lower surface of the islands including graphene includes a P-type dopant. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9900979B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9900979B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9900979B23</originalsourceid><addsrcrecordid>eNqNy7EKwjAURuEsDqK-w32ACkUHyWpRHAV1LuHmrw1N7i1N6vOLoLvTWb6zNNdGxc9cdMoVJTcEeVJC6dWTdlR6UHYJFTnxhAguk0pg8ngFRqYgHGf_mX50bRadixmbb1eGzqd7c9li1BZ5dAxBaR83a-vaHuxxt_-DvAHiVjaR</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Conductors, making method of the same, and electronic devices including the same</title><source>esp@cenet</source><creator>Kim Mi Jeong ; Cho Youngjin ; Sohn Hiesang ; Park Hyeon Cheol ; Kwak Chan ; Shin Weonho</creator><creatorcontrib>Kim Mi Jeong ; Cho Youngjin ; Sohn Hiesang ; Park Hyeon Cheol ; Kwak Chan ; Shin Weonho</creatorcontrib><description>A conductor includes a substrate, a first conductive layer disposed on the substrate and including two or more islands including graphene, and a second conductive layer disposed on the first conductive layer and including a conductive metal nanowire, wherein at least one of an upper surface and a lower surface of the islands including graphene includes a P-type dopant.</description><language>eng</language><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180220&DB=EPODOC&CC=US&NR=9900979B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180220&DB=EPODOC&CC=US&NR=9900979B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Kim Mi Jeong</creatorcontrib><creatorcontrib>Cho Youngjin</creatorcontrib><creatorcontrib>Sohn Hiesang</creatorcontrib><creatorcontrib>Park Hyeon Cheol</creatorcontrib><creatorcontrib>Kwak Chan</creatorcontrib><creatorcontrib>Shin Weonho</creatorcontrib><title>Conductors, making method of the same, and electronic devices including the same</title><description>A conductor includes a substrate, a first conductive layer disposed on the substrate and including two or more islands including graphene, and a second conductive layer disposed on the first conductive layer and including a conductive metal nanowire, wherein at least one of an upper surface and a lower surface of the islands including graphene includes a P-type dopant.</description><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNy7EKwjAURuEsDqK-w32ACkUHyWpRHAV1LuHmrw1N7i1N6vOLoLvTWb6zNNdGxc9cdMoVJTcEeVJC6dWTdlR6UHYJFTnxhAguk0pg8ngFRqYgHGf_mX50bRadixmbb1eGzqd7c9li1BZ5dAxBaR83a-vaHuxxt_-DvAHiVjaR</recordid><startdate>20180220</startdate><enddate>20180220</enddate><creator>Kim Mi Jeong</creator><creator>Cho Youngjin</creator><creator>Sohn Hiesang</creator><creator>Park Hyeon Cheol</creator><creator>Kwak Chan</creator><creator>Shin Weonho</creator><scope>EVB</scope></search><sort><creationdate>20180220</creationdate><title>Conductors, making method of the same, and electronic devices including the same</title><author>Kim Mi Jeong ; Cho Youngjin ; Sohn Hiesang ; Park Hyeon Cheol ; Kwak Chan ; Shin Weonho</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9900979B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2018</creationdate><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><toplevel>online_resources</toplevel><creatorcontrib>Kim Mi Jeong</creatorcontrib><creatorcontrib>Cho Youngjin</creatorcontrib><creatorcontrib>Sohn Hiesang</creatorcontrib><creatorcontrib>Park Hyeon Cheol</creatorcontrib><creatorcontrib>Kwak Chan</creatorcontrib><creatorcontrib>Shin Weonho</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kim Mi Jeong</au><au>Cho Youngjin</au><au>Sohn Hiesang</au><au>Park Hyeon Cheol</au><au>Kwak Chan</au><au>Shin Weonho</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Conductors, making method of the same, and electronic devices including the same</title><date>2018-02-20</date><risdate>2018</risdate><abstract>A conductor includes a substrate, a first conductive layer disposed on the substrate and including two or more islands including graphene, and a second conductive layer disposed on the first conductive layer and including a conductive metal nanowire, wherein at least one of an upper surface and a lower surface of the islands including graphene includes a P-type dopant.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS |
| title | Conductors, making method of the same, and electronic devices including the same |
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