Self-latch sense timing in a one-time-programmable memory architecture

A programmable memory including a self-latching read data path. A sense amplifier senses the voltage level at a bit line, the bit line communicating the data state of a selected memory cell in its associated column. A data latch coupled to the output of the sense amplifier passes the sensed data sta...

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Bibliographische Detailangaben
Hauptverfasser: Davis Harold L, Toops David J, Qiu Yunchen
Format: Patent
Sprache:eng
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