Driving circuit with a feed through voltage compensation and array substrate

A driving circuit with a feed through voltage compensation includes multiple gate scanning lines, multiple storage capacitance lines and multiple stages of common driving units. The common driving unit includes a gate driver and a storage capacitance driver, where the gate driver is connected to a gate scanning line to output a gate scanning signal, and the storage capacitance driver is connected to a storage capacitance line to output a storage capacitance signal. The storage capacitance signal outputted from the storage capacitance driver is adapted to compensate the gate scanning signal output from the gate driver. The driving circuit with the feed through voltage compensation allows a large gate-to-drain parasitic capacitance of the pixel, and the width of the black matrix may become smaller; therefore the pixel aperture ratio may be increased, the cost may be reduced, or the power consumption may be reduced.