Partial sacrificial dummy gate with CMOS device with high-k metal gate

A gate structure in a semiconductor device includes: a gate stack formed on a substrate with three sections, a bottom portion, a top portion, and a sacrificial cap layer over the top portion; gate spacers, source and drain regions, a nitride encapsulation over top and sidewalls of the gate stack aft...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Jaeger Daniel J, Lu Yu, Guo Dechao, Haensch Wilfried E, Han Shu-jen, Wong Keith Kwong Hon
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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