Queued instruction re-dispatch after runahead

Various embodiments of microprocessors and methods of operating a microprocessor during runahead operation are disclosed herein. One example method of operating a microprocessor includes identifying a runahead-triggering event associated with a runahead-triggering instruction and, responsive to iden...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Rozas Guillermo J, Serris Paul, Boggs Darrell D, Klaiber Alexander, van Zoeren James, Hoyt Brad, Baktha Aravindh, Ramakrishnan Sridharan, Vanderschoot Hens, Segelken Ross, Ekman Magnus, Dunn David
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Rozas Guillermo J
Serris Paul
Boggs Darrell D
Klaiber Alexander
van Zoeren James
Hoyt Brad
Baktha Aravindh
Ramakrishnan Sridharan
Vanderschoot Hens
Segelken Ross
Ekman Magnus
Dunn David
description Various embodiments of microprocessors and methods of operating a microprocessor during runahead operation are disclosed herein. One example method of operating a microprocessor includes identifying a runahead-triggering event associated with a runahead-triggering instruction and, responsive to identification of the runahead-triggering event, entering runahead operation and inserting the runahead-triggering instruction along with one or more additional instructions in a queue. The example method also includes resuming non-runahead operation of the microprocessor in response to resolution of the runahead-triggering event and re-dispatching the runahead-triggering instruction along with the one or more additional instructions from the queue to the execution logic.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9823931B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9823931B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9823931B23</originalsourceid><addsrcrecordid>eNrjZNANLE0tTU1RyMwrLikqTS7JzM9TKErVTcksLkgsSc5QSEwrSS1SKCrNS8xITUzhYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpQC3JqXmpJfGhwZYWRsaWxoZORsZEKAEAnXIqRQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Queued instruction re-dispatch after runahead</title><source>esp@cenet</source><creator>Rozas Guillermo J ; Serris Paul ; Boggs Darrell D ; Klaiber Alexander ; van Zoeren James ; Hoyt Brad ; Baktha Aravindh ; Ramakrishnan Sridharan ; Vanderschoot Hens ; Segelken Ross ; Ekman Magnus ; Dunn David</creator><creatorcontrib>Rozas Guillermo J ; Serris Paul ; Boggs Darrell D ; Klaiber Alexander ; van Zoeren James ; Hoyt Brad ; Baktha Aravindh ; Ramakrishnan Sridharan ; Vanderschoot Hens ; Segelken Ross ; Ekman Magnus ; Dunn David</creatorcontrib><description>Various embodiments of microprocessors and methods of operating a microprocessor during runahead operation are disclosed herein. One example method of operating a microprocessor includes identifying a runahead-triggering event associated with a runahead-triggering instruction and, responsive to identification of the runahead-triggering event, entering runahead operation and inserting the runahead-triggering instruction along with one or more additional instructions in a queue. The example method also includes resuming non-runahead operation of the microprocessor in response to resolution of the runahead-triggering event and re-dispatching the runahead-triggering instruction along with the one or more additional instructions from the queue to the execution logic.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2017</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20171121&amp;DB=EPODOC&amp;CC=US&amp;NR=9823931B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20171121&amp;DB=EPODOC&amp;CC=US&amp;NR=9823931B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Rozas Guillermo J</creatorcontrib><creatorcontrib>Serris Paul</creatorcontrib><creatorcontrib>Boggs Darrell D</creatorcontrib><creatorcontrib>Klaiber Alexander</creatorcontrib><creatorcontrib>van Zoeren James</creatorcontrib><creatorcontrib>Hoyt Brad</creatorcontrib><creatorcontrib>Baktha Aravindh</creatorcontrib><creatorcontrib>Ramakrishnan Sridharan</creatorcontrib><creatorcontrib>Vanderschoot Hens</creatorcontrib><creatorcontrib>Segelken Ross</creatorcontrib><creatorcontrib>Ekman Magnus</creatorcontrib><creatorcontrib>Dunn David</creatorcontrib><title>Queued instruction re-dispatch after runahead</title><description>Various embodiments of microprocessors and methods of operating a microprocessor during runahead operation are disclosed herein. One example method of operating a microprocessor includes identifying a runahead-triggering event associated with a runahead-triggering instruction and, responsive to identification of the runahead-triggering event, entering runahead operation and inserting the runahead-triggering instruction along with one or more additional instructions in a queue. The example method also includes resuming non-runahead operation of the microprocessor in response to resolution of the runahead-triggering event and re-dispatching the runahead-triggering instruction along with the one or more additional instructions from the queue to the execution logic.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2017</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNANLE0tTU1RyMwrLikqTS7JzM9TKErVTcksLkgsSc5QSEwrSS1SKCrNS8xITUzhYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpQC3JqXmpJfGhwZYWRsaWxoZORsZEKAEAnXIqRQ</recordid><startdate>20171121</startdate><enddate>20171121</enddate><creator>Rozas Guillermo J</creator><creator>Serris Paul</creator><creator>Boggs Darrell D</creator><creator>Klaiber Alexander</creator><creator>van Zoeren James</creator><creator>Hoyt Brad</creator><creator>Baktha Aravindh</creator><creator>Ramakrishnan Sridharan</creator><creator>Vanderschoot Hens</creator><creator>Segelken Ross</creator><creator>Ekman Magnus</creator><creator>Dunn David</creator><scope>EVB</scope></search><sort><creationdate>20171121</creationdate><title>Queued instruction re-dispatch after runahead</title><author>Rozas Guillermo J ; Serris Paul ; Boggs Darrell D ; Klaiber Alexander ; van Zoeren James ; Hoyt Brad ; Baktha Aravindh ; Ramakrishnan Sridharan ; Vanderschoot Hens ; Segelken Ross ; Ekman Magnus ; Dunn David</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9823931B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2017</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Rozas Guillermo J</creatorcontrib><creatorcontrib>Serris Paul</creatorcontrib><creatorcontrib>Boggs Darrell D</creatorcontrib><creatorcontrib>Klaiber Alexander</creatorcontrib><creatorcontrib>van Zoeren James</creatorcontrib><creatorcontrib>Hoyt Brad</creatorcontrib><creatorcontrib>Baktha Aravindh</creatorcontrib><creatorcontrib>Ramakrishnan Sridharan</creatorcontrib><creatorcontrib>Vanderschoot Hens</creatorcontrib><creatorcontrib>Segelken Ross</creatorcontrib><creatorcontrib>Ekman Magnus</creatorcontrib><creatorcontrib>Dunn David</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Rozas Guillermo J</au><au>Serris Paul</au><au>Boggs Darrell D</au><au>Klaiber Alexander</au><au>van Zoeren James</au><au>Hoyt Brad</au><au>Baktha Aravindh</au><au>Ramakrishnan Sridharan</au><au>Vanderschoot Hens</au><au>Segelken Ross</au><au>Ekman Magnus</au><au>Dunn David</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Queued instruction re-dispatch after runahead</title><date>2017-11-21</date><risdate>2017</risdate><abstract>Various embodiments of microprocessors and methods of operating a microprocessor during runahead operation are disclosed herein. One example method of operating a microprocessor includes identifying a runahead-triggering event associated with a runahead-triggering instruction and, responsive to identification of the runahead-triggering event, entering runahead operation and inserting the runahead-triggering instruction along with one or more additional instructions in a queue. The example method also includes resuming non-runahead operation of the microprocessor in response to resolution of the runahead-triggering event and re-dispatching the runahead-triggering instruction along with the one or more additional instructions from the queue to the execution logic.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US9823931B2
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Queued instruction re-dispatch after runahead
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-26T06%3A38%3A08IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Rozas%20Guillermo%20J&rft.date=2017-11-21&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS9823931B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true