Operation recording circuit and operation method thereof
An operation recording circuit and an operation method thereof are provided. The operation recording circuit includes a pin monitor unit, a memory unit, a data writing unit, a mode verification unit and a data dumping unit. The pin monitor unit monitors at least one first type pin of an integrated c...
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creator | Lu Chia-Ching |
description | An operation recording circuit and an operation method thereof are provided. The operation recording circuit includes a pin monitor unit, a memory unit, a data writing unit, a mode verification unit and a data dumping unit. The pin monitor unit monitors at least one first type pin of an integrated circuit (IC) to correspondingly provide a monitor signal. The data writing unit writes at least one monitor records into the memory unit according the monitor signal. When receiving a test dump command through at least one second type pin of the IC, the mode verification unit correspondingly provides a dump control signal. The data dumping unit determines whether to output the at least one monitor records from the memory unit through the at least one second type pin or not according to the dump control signal. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9818494B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9818494B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9818494B23</originalsourceid><addsrcrecordid>eNrjZLDwL0gtSizJzM9TKEpNzi9KycxLV0jOLEouzSxRSMxLUciHy-emlmTkpyiUZKQWpean8TCwpiXmFKfyQmluBgU31xBnD93Ugvz41OKCxOTUvNSS-NBgSwtDCxNLEycjYyKUAADpOy6a</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Operation recording circuit and operation method thereof</title><source>esp@cenet</source><creator>Lu Chia-Ching</creator><creatorcontrib>Lu Chia-Ching</creatorcontrib><description>An operation recording circuit and an operation method thereof are provided. The operation recording circuit includes a pin monitor unit, a memory unit, a data writing unit, a mode verification unit and a data dumping unit. The pin monitor unit monitors at least one first type pin of an integrated circuit (IC) to correspondingly provide a monitor signal. The data writing unit writes at least one monitor records into the memory unit according the monitor signal. When receiving a test dump command through at least one second type pin of the IC, the mode verification unit correspondingly provides a dump control signal. The data dumping unit determines whether to output the at least one monitor records from the memory unit through the at least one second type pin or not according to the dump control signal.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2017</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20171114&DB=EPODOC&CC=US&NR=9818494B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20171114&DB=EPODOC&CC=US&NR=9818494B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Lu Chia-Ching</creatorcontrib><title>Operation recording circuit and operation method thereof</title><description>An operation recording circuit and an operation method thereof are provided. The operation recording circuit includes a pin monitor unit, a memory unit, a data writing unit, a mode verification unit and a data dumping unit. The pin monitor unit monitors at least one first type pin of an integrated circuit (IC) to correspondingly provide a monitor signal. The data writing unit writes at least one monitor records into the memory unit according the monitor signal. When receiving a test dump command through at least one second type pin of the IC, the mode verification unit correspondingly provides a dump control signal. The data dumping unit determines whether to output the at least one monitor records from the memory unit through the at least one second type pin or not according to the dump control signal.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2017</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLDwL0gtSizJzM9TKEpNzi9KycxLV0jOLEouzSxRSMxLUciHy-emlmTkpyiUZKQWpean8TCwpiXmFKfyQmluBgU31xBnD93Ugvz41OKCxOTUvNSS-NBgSwtDCxNLEycjYyKUAADpOy6a</recordid><startdate>20171114</startdate><enddate>20171114</enddate><creator>Lu Chia-Ching</creator><scope>EVB</scope></search><sort><creationdate>20171114</creationdate><title>Operation recording circuit and operation method thereof</title><author>Lu Chia-Ching</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9818494B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2017</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>Lu Chia-Ching</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Lu Chia-Ching</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Operation recording circuit and operation method thereof</title><date>2017-11-14</date><risdate>2017</risdate><abstract>An operation recording circuit and an operation method thereof are provided. The operation recording circuit includes a pin monitor unit, a memory unit, a data writing unit, a mode verification unit and a data dumping unit. The pin monitor unit monitors at least one first type pin of an integrated circuit (IC) to correspondingly provide a monitor signal. The data writing unit writes at least one monitor records into the memory unit according the monitor signal. When receiving a test dump command through at least one second type pin of the IC, the mode verification unit correspondingly provides a dump control signal. The data dumping unit determines whether to output the at least one monitor records from the memory unit through the at least one second type pin or not according to the dump control signal.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE PHYSICS STATIC STORES |
title | Operation recording circuit and operation method thereof |
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