Amplifier arrangement
An amplifier arrangement is presented, comprising a first differential stage (DS1) comprising at least two transistors (M1, M1′) having a first threshold voltage (Vth1), at least a second differential stage (DS2) comprising at least two transistors (M3, M3′) having a second threshold voltage differe...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | Fitzi Andreas |
description | An amplifier arrangement is presented, comprising a first differential stage (DS1) comprising at least two transistors (M1, M1′) having a first threshold voltage (Vth1), at least a second differential stage (DS2) comprising at least two transistors (M3, M3′) having a second threshold voltage different from the first threshold voltage, at least one of the transistors of the first and second differential stage (DS1, DS2), respectively, has a control input commonly coupled to an input of the amplifier arrangement, at least one transistor (M1) of the first differential stage and one transistor (M3) of the second differential stage are arranged in a common current path, which is coupled to an output of the amplifier arrangement. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9813026B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9813026B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9813026B23</originalsourceid><addsrcrecordid>eNrjZBB1zC3IyUzLTC1SSCwqSsxLT81NzSvhYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxocGWFobGBkZmTkbGRCgBAEs3IRU</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Amplifier arrangement</title><source>esp@cenet</source><creator>Fitzi Andreas</creator><creatorcontrib>Fitzi Andreas</creatorcontrib><description>An amplifier arrangement is presented, comprising a first differential stage (DS1) comprising at least two transistors (M1, M1′) having a first threshold voltage (Vth1), at least a second differential stage (DS2) comprising at least two transistors (M3, M3′) having a second threshold voltage different from the first threshold voltage, at least one of the transistors of the first and second differential stage (DS1, DS2), respectively, has a control input commonly coupled to an input of the amplifier arrangement, at least one transistor (M1) of the first differential stage and one transistor (M3) of the second differential stage are arranged in a common current path, which is coupled to an output of the amplifier arrangement.</description><language>eng</language><subject>AMPLIFIERS ; BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY</subject><creationdate>2017</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20171107&DB=EPODOC&CC=US&NR=9813026B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20171107&DB=EPODOC&CC=US&NR=9813026B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Fitzi Andreas</creatorcontrib><title>Amplifier arrangement</title><description>An amplifier arrangement is presented, comprising a first differential stage (DS1) comprising at least two transistors (M1, M1′) having a first threshold voltage (Vth1), at least a second differential stage (DS2) comprising at least two transistors (M3, M3′) having a second threshold voltage different from the first threshold voltage, at least one of the transistors of the first and second differential stage (DS1, DS2), respectively, has a control input commonly coupled to an input of the amplifier arrangement, at least one transistor (M1) of the first differential stage and one transistor (M3) of the second differential stage are arranged in a common current path, which is coupled to an output of the amplifier arrangement.</description><subject>AMPLIFIERS</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2017</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBB1zC3IyUzLTC1SSCwqSsxLT81NzSvhYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxocGWFobGBkZmTkbGRCgBAEs3IRU</recordid><startdate>20171107</startdate><enddate>20171107</enddate><creator>Fitzi Andreas</creator><scope>EVB</scope></search><sort><creationdate>20171107</creationdate><title>Amplifier arrangement</title><author>Fitzi Andreas</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9813026B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2017</creationdate><topic>AMPLIFIERS</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>Fitzi Andreas</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Fitzi Andreas</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Amplifier arrangement</title><date>2017-11-07</date><risdate>2017</risdate><abstract>An amplifier arrangement is presented, comprising a first differential stage (DS1) comprising at least two transistors (M1, M1′) having a first threshold voltage (Vth1), at least a second differential stage (DS2) comprising at least two transistors (M3, M3′) having a second threshold voltage different from the first threshold voltage, at least one of the transistors of the first and second differential stage (DS1, DS2), respectively, has a control input commonly coupled to an input of the amplifier arrangement, at least one transistor (M1) of the first differential stage and one transistor (M3) of the second differential stage are arranged in a common current path, which is coupled to an output of the amplifier arrangement.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US9813026B2 |
source | esp@cenet |
subjects | AMPLIFIERS BASIC ELECTRONIC CIRCUITRY ELECTRICITY |
title | Amplifier arrangement |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-03T12%3A14%3A15IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Fitzi%20Andreas&rft.date=2017-11-07&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS9813026B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |