Memory utilization in a circuit design

The disclosed approaches compile a hierarchical representation of a circuit design into a flattened netlist and store the flattened netlist a memory circuit. The circuit design instantiates a plurality of memory blocks of a target device and specifies logic circuits that access the plurality of memo...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Pvss Jayaram, Susai Robert Bellarmin, Dao Khang K
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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