Committing transaction without first flushing processor cache to non-volatile memory when connected to UPS

Committing transaction without first flushing processor cache to non-volatile memory when connected to UPS

A computing system includes a processor that has a processor cache built-in, and a non-volatile memory, such as a non-volatile dual-inline memory module (NVDIMM), which is being used as system memory within the computing system. The processor processes a transaction. If the computing system is conne...

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Hauptverfasser: Bahali Sumanta Kumar, Vernon Kevin S, Reinberg Kevin Michael, Langgood John K
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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creator Bahali Sumanta Kumar
Vernon Kevin S
Reinberg Kevin Michael
Langgood John K
description A computing system includes a processor that has a processor cache built-in, and a non-volatile memory, such as a non-volatile dual-inline memory module (NVDIMM), which is being used as system memory within the computing system. The processor processes a transaction. If the computing system is connected to an uninterruptible power supply (UPS) (and the UPS is connected to a mains power source that is currently providing power), the transaction is committed without first flushing the processor cache to the non-volatile memory. If the computing system is not connected to a UPS (and is connected to a mains power source that is currently providing power), the transaction is not committed until the processor cache has been flushed to the non-volatile memory.
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Committing transaction without first flushing processor cache to non-volatile memory when connected to UPS
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