Managing memory regions to support sparse mappings

One embodiment of the present invention includes a memory management unit (MMU) that is configured to manage sparse mappings. The MMU processes requests to translate virtual addresses to physical addresses based on page table entries (PTEs) that indicate a sparse status. If the MMU determines that t...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Moreton Henry Packard, Bolz Jeffrey A, Rao Poornachandra, Brown Patrick R, Deming James Leroy, Bastos Rui M, Grewal Amanpreet, Tao Andrew J, Dunaisky Jonathan, Uralsky Yury Y, Amsinck Christian, Duluk, Jr. Jerome F
Format:	Patent
Sprache:	eng
Schlagworte:	ADVERTISING ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION CALCULATING COMPUTING COUNTING CRYPTOGRAPHY DISPLAY EDUCATION ELECTRIC DIGITAL DATA PROCESSING IMAGE DATA PROCESSING OR GENERATION, IN GENERAL PHYSICS SEALS
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