Managing memory regions to support sparse mappings
One embodiment of the present invention includes a memory management unit (MMU) that is configured to manage sparse mappings. The MMU processes requests to translate virtual addresses to physical addresses based on page table entries (PTEs) that indicate a sparse status. If the MMU determines that t...
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creator | Moreton Henry Packard Bolz Jeffrey A Rao Poornachandra Brown Patrick R Deming James Leroy Bastos Rui M Grewal Amanpreet Tao Andrew J Dunaisky Jonathan Uralsky Yury Y Amsinck Christian Duluk, Jr. Jerome F |
description | One embodiment of the present invention includes a memory management unit (MMU) that is configured to manage sparse mappings. The MMU processes requests to translate virtual addresses to physical addresses based on page table entries (PTEs) that indicate a sparse status. If the MMU determines that the PTE does not include a mapping from a virtual address to a physical address, then the MMU responds to the request based on the sparse status. If the sparse status is active, then the MMU determines the physical address based on whether the type of the request is a write operation and, subsequently, generates an acknowledgement of the request. By contrast, if the sparse status is not active, then the MMU generates a page fault. Advantageously, the disclosed embodiments enable the computer system to manage sparse mappings without incurring the performance degradation associated with both page faults and conventional software-based sparse mapping management. |
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The MMU processes requests to translate virtual addresses to physical addresses based on page table entries (PTEs) that indicate a sparse status. If the MMU determines that the PTE does not include a mapping from a virtual address to a physical address, then the MMU responds to the request based on the sparse status. If the sparse status is active, then the MMU determines the physical address based on whether the type of the request is a write operation and, subsequently, generates an acknowledgement of the request. By contrast, if the sparse status is not active, then the MMU generates a page fault. Advantageously, the disclosed embodiments enable the computer system to manage sparse mappings without incurring the performance degradation associated with both page faults and conventional software-based sparse mapping management.</description><language>eng</language><subject>ADVERTISING ; ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION ; CALCULATING ; COMPUTING ; COUNTING ; CRYPTOGRAPHY ; DISPLAY ; EDUCATION ; ELECTRIC DIGITAL DATA PROCESSING ; IMAGE DATA PROCESSING OR GENERATION, IN GENERAL ; PHYSICS ; SEALS</subject><creationdate>2017</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170905&DB=EPODOC&CC=US&NR=9754561B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170905&DB=EPODOC&CC=US&NR=9754561B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Moreton Henry Packard</creatorcontrib><creatorcontrib>Bolz Jeffrey A</creatorcontrib><creatorcontrib>Rao Poornachandra</creatorcontrib><creatorcontrib>Brown Patrick R</creatorcontrib><creatorcontrib>Deming James Leroy</creatorcontrib><creatorcontrib>Bastos Rui M</creatorcontrib><creatorcontrib>Grewal Amanpreet</creatorcontrib><creatorcontrib>Tao Andrew J</creatorcontrib><creatorcontrib>Dunaisky Jonathan</creatorcontrib><creatorcontrib>Uralsky Yury Y</creatorcontrib><creatorcontrib>Amsinck Christian</creatorcontrib><creatorcontrib>Duluk, Jr. Jerome F</creatorcontrib><title>Managing memory regions to support sparse mappings</title><description>One embodiment of the present invention includes a memory management unit (MMU) that is configured to manage sparse mappings. The MMU processes requests to translate virtual addresses to physical addresses based on page table entries (PTEs) that indicate a sparse status. If the MMU determines that the PTE does not include a mapping from a virtual address to a physical address, then the MMU responds to the request based on the sparse status. If the sparse status is active, then the MMU determines the physical address based on whether the type of the request is a write operation and, subsequently, generates an acknowledgement of the request. By contrast, if the sparse status is not active, then the MMU generates a page fault. Advantageously, the disclosed embodiments enable the computer system to manage sparse mappings without incurring the performance degradation associated with both page faults and conventional software-based sparse mapping management.</description><subject>ADVERTISING</subject><subject>ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION</subject><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>CRYPTOGRAPHY</subject><subject>DISPLAY</subject><subject>EDUCATION</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>IMAGE DATA PROCESSING OR GENERATION, IN GENERAL</subject><subject>PHYSICS</subject><subject>SEALS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2017</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDDyTcxLTM_MS1fITc3NL6pUKEpNz8zPK1YoyVcoLi0oyC8qUSguSCwqTlXITSwoACos5mFgTUvMKU7lhdLcDApuriHOHrqpBfnxqUDFyal5qSXxocGW5qYmpmaGTkbGRCgBAKbALFQ</recordid><startdate>20170905</startdate><enddate>20170905</enddate><creator>Moreton Henry Packard</creator><creator>Bolz Jeffrey A</creator><creator>Rao Poornachandra</creator><creator>Brown Patrick R</creator><creator>Deming James Leroy</creator><creator>Bastos Rui M</creator><creator>Grewal Amanpreet</creator><creator>Tao Andrew J</creator><creator>Dunaisky Jonathan</creator><creator>Uralsky Yury Y</creator><creator>Amsinck Christian</creator><creator>Duluk, Jr. Jerome F</creator><scope>EVB</scope></search><sort><creationdate>20170905</creationdate><title>Managing memory regions to support sparse mappings</title><author>Moreton Henry Packard ; Bolz Jeffrey A ; Rao Poornachandra ; Brown Patrick R ; Deming James Leroy ; Bastos Rui M ; Grewal Amanpreet ; Tao Andrew J ; Dunaisky Jonathan ; Uralsky Yury Y ; Amsinck Christian ; Duluk, Jr. Jerome F</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9754561B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2017</creationdate><topic>ADVERTISING</topic><topic>ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION</topic><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>CRYPTOGRAPHY</topic><topic>DISPLAY</topic><topic>EDUCATION</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>IMAGE DATA PROCESSING OR GENERATION, IN GENERAL</topic><topic>PHYSICS</topic><topic>SEALS</topic><toplevel>online_resources</toplevel><creatorcontrib>Moreton Henry Packard</creatorcontrib><creatorcontrib>Bolz Jeffrey A</creatorcontrib><creatorcontrib>Rao Poornachandra</creatorcontrib><creatorcontrib>Brown Patrick R</creatorcontrib><creatorcontrib>Deming James Leroy</creatorcontrib><creatorcontrib>Bastos Rui M</creatorcontrib><creatorcontrib>Grewal Amanpreet</creatorcontrib><creatorcontrib>Tao Andrew J</creatorcontrib><creatorcontrib>Dunaisky Jonathan</creatorcontrib><creatorcontrib>Uralsky Yury Y</creatorcontrib><creatorcontrib>Amsinck Christian</creatorcontrib><creatorcontrib>Duluk, Jr. Jerome F</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Moreton Henry Packard</au><au>Bolz Jeffrey A</au><au>Rao Poornachandra</au><au>Brown Patrick R</au><au>Deming James Leroy</au><au>Bastos Rui M</au><au>Grewal Amanpreet</au><au>Tao Andrew J</au><au>Dunaisky Jonathan</au><au>Uralsky Yury Y</au><au>Amsinck Christian</au><au>Duluk, Jr. Jerome F</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Managing memory regions to support sparse mappings</title><date>2017-09-05</date><risdate>2017</risdate><abstract>One embodiment of the present invention includes a memory management unit (MMU) that is configured to manage sparse mappings. The MMU processes requests to translate virtual addresses to physical addresses based on page table entries (PTEs) that indicate a sparse status. If the MMU determines that the PTE does not include a mapping from a virtual address to a physical address, then the MMU responds to the request based on the sparse status. If the sparse status is active, then the MMU determines the physical address based on whether the type of the request is a write operation and, subsequently, generates an acknowledgement of the request. By contrast, if the sparse status is not active, then the MMU generates a page fault. Advantageously, the disclosed embodiments enable the computer system to manage sparse mappings without incurring the performance degradation associated with both page faults and conventional software-based sparse mapping management.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | ADVERTISING ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION CALCULATING COMPUTING COUNTING CRYPTOGRAPHY DISPLAY EDUCATION ELECTRIC DIGITAL DATA PROCESSING IMAGE DATA PROCESSING OR GENERATION, IN GENERAL PHYSICS SEALS |
title | Managing memory regions to support sparse mappings |
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