Dynamic synchronous to asynchronous frequency transitions in high-performance symmetric multiprocessing

In one embodiment, a computer-implemented method includes instructing two or more processors that are operating in a normal state of a symmetric multiprocessing (SMP) network to transition from the normal state to a slow state. The two or more processors reduce their frequencies to respective target...

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Bibliographische Detailangaben

Hauptverfasser:	Klapproth Kenneth D, Drapala Garrett M, Sonnelitter, III Robert J, Fee Michael F
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PHYSICS PRINTED CIRCUITS
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