Apparatus and methods to provide power management for memory devices

An apparatus, such as a nonvolatile solid-state memory device, may, in some implementations, include access line bias circuitry to set a bias level associated with a deselected access line(s) of a memory core in response to mode information. In one approach, access line bias circuitry may use linear...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Hendrickson Nicholas, Barkley Gerald
Format: Patent
Sprache:eng
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