Masking a power state of a core of a processor

In one embodiment, a processor includes a core to execute instructions and a core perimeter logic coupled to the core. The core perimeter logic may include a fabric interface logic coupled to the core. In turn, the fabric interface logic may include a first storage to store state information of the...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Sistla Krishnakanth V, Novakovsky Larisa, Garg Vivek, Choubal Ashish V, Hallnor Erik G, Mulla Dean, Gendler Alexander, Weier Kimberly C
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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