Semiconductor memory device and method of controlling the same

According to one embodiment, a semiconductor memory device includes a plurality of first wirings, a plurality of second wirings, a variable resistance layer, a first barrier insulating layer, and a second barrier insulating layer. The first wirings are disposed at predetermined pitches in a first di...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Toriyama Shuichi, Ichihara Reika
Format: Patent
Sprache:eng
Schlagworte:
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