Constraint handling for parameterizable hardware description language

Constraint handling for a circuit design may include determining, using a processor, instances of parameterizable modules of a circuit design associated with constraints based upon a predefined hardware description language attribute within the instances, extracting, using the processor, parameter v...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Jha Pradip K, Monga Dinesh K, Rozum Stephen P, Kurlagunda Ravi N, Knol David A, Chakraborty Sudipto
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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