Constraint handling for parameterizable hardware description language

Constraint handling for parameterizable hardware description language

Constraint handling for a circuit design may include determining, using a processor, instances of parameterizable modules of a circuit design associated with constraints based upon a predefined hardware description language attribute within the instances, extracting, using the processor, parameter v...

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Hauptverfasser: Jha Pradip K, Monga Dinesh K, Rozum Stephen P, Kurlagunda Ravi N, Knol David A, Chakraborty Sudipto
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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creator Jha Pradip K
Monga Dinesh K
Rozum Stephen P
Kurlagunda Ravi N
Knol David A
Chakraborty Sudipto
description Constraint handling for a circuit design may include determining, using a processor, instances of parameterizable modules of a circuit design associated with constraints based upon a predefined hardware description language attribute within the instances, extracting, using the processor, parameter values from the instances of the parameterizable modules, and generating, using the processor, static constraint files for the instances of the parameterizable modules using the extracted parameter values.
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Constraint handling for parameterizable hardware description language
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