Test board and method for qualifying a printed circuit board assembly and/or repair process
A method for qualifying circuit board fabrication, assembly, and repair processes includes establishing primary assembly process specifications and secondary repair process specifications. A group of test circuit boards is assembled using the primary assembly process, with each board having a sectio...
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creator | Middleton Steve Munson Terry L |
description | A method for qualifying circuit board fabrication, assembly, and repair processes includes establishing primary assembly process specifications and secondary repair process specifications. A group of test circuit boards is assembled using the primary assembly process, with each board having a section of components linked together to provide functional circuits and a section of components daisy-chained together to provide non-functional circuits, and with each section also including SIR test patterns and CAF test patterns. A subset of the assembled test boards is then repaired using the secondary repair process. A sample of each set of the test boards is exposed to test conditions including thermal cycle test conditions, humidity test conditions, and vibration test conditions. Inner layer build quality, surface cleanliness, circuit performance, and solder joint quality are then evaluated using the provided circuitry. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9658280B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9658280B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9658280B23</originalsourceid><addsrcrecordid>eNqNy7EKwjAQgOEuDqK-w72AKBWlroribp0cyjW56EGaxLt06NtbQZyd_uX_psW9Js3QRhQLGCx0lJ_RgosCrx49u4HDAxCScMhkwbCYnn9ClbrWDx-6GolQQpZxjoZU58XEoVdafDsr4Hyqj5clpdiQJjQUKDe36363rcpqfSg3fyxv1LI7Ew</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Test board and method for qualifying a printed circuit board assembly and/or repair process</title><source>esp@cenet</source><creator>Middleton Steve ; Munson Terry L</creator><creatorcontrib>Middleton Steve ; Munson Terry L</creatorcontrib><description>A method for qualifying circuit board fabrication, assembly, and repair processes includes establishing primary assembly process specifications and secondary repair process specifications. A group of test circuit boards is assembled using the primary assembly process, with each board having a section of components linked together to provide functional circuits and a section of components daisy-chained together to provide non-functional circuits, and with each section also including SIR test patterns and CAF test patterns. A subset of the assembled test boards is then repaired using the secondary repair process. A sample of each set of the test boards is exposed to test conditions including thermal cycle test conditions, humidity test conditions, and vibration test conditions. Inner layer build quality, surface cleanliness, circuit performance, and solder joint quality are then evaluated using the provided circuitry.</description><language>eng</language><subject>MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; TESTING</subject><creationdate>2017</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170523&DB=EPODOC&CC=US&NR=9658280B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170523&DB=EPODOC&CC=US&NR=9658280B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Middleton Steve</creatorcontrib><creatorcontrib>Munson Terry L</creatorcontrib><title>Test board and method for qualifying a printed circuit board assembly and/or repair process</title><description>A method for qualifying circuit board fabrication, assembly, and repair processes includes establishing primary assembly process specifications and secondary repair process specifications. A group of test circuit boards is assembled using the primary assembly process, with each board having a section of components linked together to provide functional circuits and a section of components daisy-chained together to provide non-functional circuits, and with each section also including SIR test patterns and CAF test patterns. A subset of the assembled test boards is then repaired using the secondary repair process. A sample of each set of the test boards is exposed to test conditions including thermal cycle test conditions, humidity test conditions, and vibration test conditions. Inner layer build quality, surface cleanliness, circuit performance, and solder joint quality are then evaluated using the provided circuitry.</description><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2017</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNy7EKwjAQgOEuDqK-w72AKBWlroribp0cyjW56EGaxLt06NtbQZyd_uX_psW9Js3QRhQLGCx0lJ_RgosCrx49u4HDAxCScMhkwbCYnn9ClbrWDx-6GolQQpZxjoZU58XEoVdafDsr4Hyqj5clpdiQJjQUKDe36363rcpqfSg3fyxv1LI7Ew</recordid><startdate>20170523</startdate><enddate>20170523</enddate><creator>Middleton Steve</creator><creator>Munson Terry L</creator><scope>EVB</scope></search><sort><creationdate>20170523</creationdate><title>Test board and method for qualifying a printed circuit board assembly and/or repair process</title><author>Middleton Steve ; Munson Terry L</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9658280B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2017</creationdate><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>Middleton Steve</creatorcontrib><creatorcontrib>Munson Terry L</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Middleton Steve</au><au>Munson Terry L</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Test board and method for qualifying a printed circuit board assembly and/or repair process</title><date>2017-05-23</date><risdate>2017</risdate><abstract>A method for qualifying circuit board fabrication, assembly, and repair processes includes establishing primary assembly process specifications and secondary repair process specifications. A group of test circuit boards is assembled using the primary assembly process, with each board having a section of components linked together to provide functional circuits and a section of components daisy-chained together to provide non-functional circuits, and with each section also including SIR test patterns and CAF test patterns. A subset of the assembled test boards is then repaired using the secondary repair process. A sample of each set of the test boards is exposed to test conditions including thermal cycle test conditions, humidity test conditions, and vibration test conditions. Inner layer build quality, surface cleanliness, circuit performance, and solder joint quality are then evaluated using the provided circuitry.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS TESTING |
title | Test board and method for qualifying a printed circuit board assembly and/or repair process |
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