Signal processor suitable for low intermediate frequency (LIF) or zero intermediate frequency (ZIF) operation
A signal processor for a radio frequency (RF) receiver includes a plurality of distributed signal processing elements, in which a first one receives an input signal and a last one provides an output signal, and a plurality of gain elements interspersed between pairs of said plurality of distributed...
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| creator | Coban Abdulkerim L Khoini-Poorfard Ramin Piovaccari Alessandro Kao James T |
| description | A signal processor for a radio frequency (RF) receiver includes a plurality of distributed signal processing elements, in which a first one receives an input signal and a last one provides an output signal, and a plurality of gain elements interspersed between pairs of said plurality of distributed signal processing elements. The signal processor also includes a like plurality of peak detectors coupled to outputs of corresponding ones of said plurality of gain elements, and an automatic gain controller having inputs coupled to outputs of each of the peak detectors, and outputs coupled to each of the plurality of gain elements. The automatic gain controller independently controls each of the plurality of gain elements to form a like plurality of independent automatic gain control (AGC) loops. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9647623B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9647623B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9647623B23</originalsourceid><addsrcrecordid>eNrjZMgNzkzPS8xRKCjKT04tLs4vUiguzSxJTMpJVUgDcnLyyxUy80pSi3JTUzITS4CCRamFpal5yZUKGj6ebpoKQDVVqUX5OBVFgRUVpBYllmTm5_EwsKYl5hSn8kJpbgYFN9cQZw_d1IL8-NTigsTk1LzUkvjQYEszE3MzI2MnI2MilAAAwuxBcg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Signal processor suitable for low intermediate frequency (LIF) or zero intermediate frequency (ZIF) operation</title><source>esp@cenet</source><creator>Coban Abdulkerim L ; Khoini-Poorfard Ramin ; Piovaccari Alessandro ; Kao James T</creator><creatorcontrib>Coban Abdulkerim L ; Khoini-Poorfard Ramin ; Piovaccari Alessandro ; Kao James T</creatorcontrib><description>A signal processor for a radio frequency (RF) receiver includes a plurality of distributed signal processing elements, in which a first one receives an input signal and a last one provides an output signal, and a plurality of gain elements interspersed between pairs of said plurality of distributed signal processing elements. The signal processor also includes a like plurality of peak detectors coupled to outputs of corresponding ones of said plurality of gain elements, and an automatic gain controller having inputs coupled to outputs of each of the peak detectors, and outputs coupled to each of the plurality of gain elements. The automatic gain controller independently controls each of the plurality of gain elements to form a like plurality of independent automatic gain control (AGC) loops.</description><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; CONTROL OF AMPLIFICATION ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRICITY ; TRANSMISSION</subject><creationdate>2017</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170509&DB=EPODOC&CC=US&NR=9647623B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170509&DB=EPODOC&CC=US&NR=9647623B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Coban Abdulkerim L</creatorcontrib><creatorcontrib>Khoini-Poorfard Ramin</creatorcontrib><creatorcontrib>Piovaccari Alessandro</creatorcontrib><creatorcontrib>Kao James T</creatorcontrib><title>Signal processor suitable for low intermediate frequency (LIF) or zero intermediate frequency (ZIF) operation</title><description>A signal processor for a radio frequency (RF) receiver includes a plurality of distributed signal processing elements, in which a first one receives an input signal and a last one provides an output signal, and a plurality of gain elements interspersed between pairs of said plurality of distributed signal processing elements. The signal processor also includes a like plurality of peak detectors coupled to outputs of corresponding ones of said plurality of gain elements, and an automatic gain controller having inputs coupled to outputs of each of the peak detectors, and outputs coupled to each of the plurality of gain elements. The automatic gain controller independently controls each of the plurality of gain elements to form a like plurality of independent automatic gain control (AGC) loops.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CONTROL OF AMPLIFICATION</subject><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRICITY</subject><subject>TRANSMISSION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2017</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZMgNzkzPS8xRKCjKT04tLs4vUiguzSxJTMpJVUgDcnLyyxUy80pSi3JTUzITS4CCRamFpal5yZUKGj6ebpoKQDVVqUX5OBVFgRUVpBYllmTm5_EwsKYl5hSn8kJpbgYFN9cQZw_d1IL8-NTigsTk1LzUkvjQYEszE3MzI2MnI2MilAAAwuxBcg</recordid><startdate>20170509</startdate><enddate>20170509</enddate><creator>Coban Abdulkerim L</creator><creator>Khoini-Poorfard Ramin</creator><creator>Piovaccari Alessandro</creator><creator>Kao James T</creator><scope>EVB</scope></search><sort><creationdate>20170509</creationdate><title>Signal processor suitable for low intermediate frequency (LIF) or zero intermediate frequency (ZIF) operation</title><author>Coban Abdulkerim L ; Khoini-Poorfard Ramin ; Piovaccari Alessandro ; Kao James T</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9647623B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2017</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CONTROL OF AMPLIFICATION</topic><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRICITY</topic><topic>TRANSMISSION</topic><toplevel>online_resources</toplevel><creatorcontrib>Coban Abdulkerim L</creatorcontrib><creatorcontrib>Khoini-Poorfard Ramin</creatorcontrib><creatorcontrib>Piovaccari Alessandro</creatorcontrib><creatorcontrib>Kao James T</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Coban Abdulkerim L</au><au>Khoini-Poorfard Ramin</au><au>Piovaccari Alessandro</au><au>Kao James T</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Signal processor suitable for low intermediate frequency (LIF) or zero intermediate frequency (ZIF) operation</title><date>2017-05-09</date><risdate>2017</risdate><abstract>A signal processor for a radio frequency (RF) receiver includes a plurality of distributed signal processing elements, in which a first one receives an input signal and a last one provides an output signal, and a plurality of gain elements interspersed between pairs of said plurality of distributed signal processing elements. The signal processor also includes a like plurality of peak detectors coupled to outputs of corresponding ones of said plurality of gain elements, and an automatic gain controller having inputs coupled to outputs of each of the peak detectors, and outputs coupled to each of the plurality of gain elements. The automatic gain controller independently controls each of the plurality of gain elements to form a like plurality of independent automatic gain control (AGC) loops.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRONIC CIRCUITRY CONTROL OF AMPLIFICATION ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY TRANSMISSION |
| title | Signal processor suitable for low intermediate frequency (LIF) or zero intermediate frequency (ZIF) operation |
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