Method and apparatus for master-clone optimization during circuit analysis

A system, method and/or computer program for optimizing a circuit design. In some embodiments, a target block with an external boundary and external boundary pins is identified in an integrated circuit design. An area outside the target block is converted into a first macro, wherein the first macro...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Pan Deng, Liu Dongzi
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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