Parity protection of a register

The embodiments herein generate parity check data which serves as parity-on-parity. Stated differently, the parity check data can be used to determine if parity data stored in a memory element has been corrupted. For example, after generating the parity data, a computing system may set the parity ch...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Bowman Joshua W, Chu Sam G, Terry David R, Nguyen Dung Q, Jeganathan Dhivya, Kucharski Cliff
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Bowman Joshua W
Chu Sam G
Terry David R
Nguyen Dung Q
Jeganathan Dhivya
Kucharski Cliff
description The embodiments herein generate parity check data which serves as parity-on-parity. Stated differently, the parity check data can be used to determine if parity data stored in a memory element has been corrupted. For example, after generating the parity data, a computing system may set the parity check data depending on whether there is an even or odd number of logical ones (or logical zeros) in the parity data. Thus, when the parity data is read out of the memory element, if the parity data does not include the same number of even or odd bits, the parity check data indicates to the computing system that the parity data is corrupted. In one embodiment, to reduce the likelihood that the parity check data becomes corrupted, the computing system stores this data in hardened latches which are less susceptible to soft errors than other types of memory elements.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9639418B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9639418B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9639418B23</originalsourceid><addsrcrecordid>eNrjZJAPSCzKLKlUKCjKL0lNLsnMz1PIT1NIVChKTc8sLkkt4mFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8aHBlmbGliaGFk5GxkQoAQDpyiTD</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Parity protection of a register</title><source>esp@cenet</source><creator>Bowman Joshua W ; Chu Sam G ; Terry David R ; Nguyen Dung Q ; Jeganathan Dhivya ; Kucharski Cliff</creator><creatorcontrib>Bowman Joshua W ; Chu Sam G ; Terry David R ; Nguyen Dung Q ; Jeganathan Dhivya ; Kucharski Cliff</creatorcontrib><description>The embodiments herein generate parity check data which serves as parity-on-parity. Stated differently, the parity check data can be used to determine if parity data stored in a memory element has been corrupted. For example, after generating the parity data, a computing system may set the parity check data depending on whether there is an even or odd number of logical ones (or logical zeros) in the parity data. Thus, when the parity data is read out of the memory element, if the parity data does not include the same number of even or odd bits, the parity check data indicates to the computing system that the parity data is corrupted. In one embodiment, to reduce the likelihood that the parity check data becomes corrupted, the computing system stores this data in hardened latches which are less susceptible to soft errors than other types of memory elements.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2017</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20170502&amp;DB=EPODOC&amp;CC=US&amp;NR=9639418B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20170502&amp;DB=EPODOC&amp;CC=US&amp;NR=9639418B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Bowman Joshua W</creatorcontrib><creatorcontrib>Chu Sam G</creatorcontrib><creatorcontrib>Terry David R</creatorcontrib><creatorcontrib>Nguyen Dung Q</creatorcontrib><creatorcontrib>Jeganathan Dhivya</creatorcontrib><creatorcontrib>Kucharski Cliff</creatorcontrib><title>Parity protection of a register</title><description>The embodiments herein generate parity check data which serves as parity-on-parity. Stated differently, the parity check data can be used to determine if parity data stored in a memory element has been corrupted. For example, after generating the parity data, a computing system may set the parity check data depending on whether there is an even or odd number of logical ones (or logical zeros) in the parity data. Thus, when the parity data is read out of the memory element, if the parity data does not include the same number of even or odd bits, the parity check data indicates to the computing system that the parity data is corrupted. In one embodiment, to reduce the likelihood that the parity check data becomes corrupted, the computing system stores this data in hardened latches which are less susceptible to soft errors than other types of memory elements.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2017</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJAPSCzKLKlUKCjKL0lNLsnMz1PIT1NIVChKTc8sLkkt4mFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8aHBlmbGliaGFk5GxkQoAQDpyiTD</recordid><startdate>20170502</startdate><enddate>20170502</enddate><creator>Bowman Joshua W</creator><creator>Chu Sam G</creator><creator>Terry David R</creator><creator>Nguyen Dung Q</creator><creator>Jeganathan Dhivya</creator><creator>Kucharski Cliff</creator><scope>EVB</scope></search><sort><creationdate>20170502</creationdate><title>Parity protection of a register</title><author>Bowman Joshua W ; Chu Sam G ; Terry David R ; Nguyen Dung Q ; Jeganathan Dhivya ; Kucharski Cliff</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9639418B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2017</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Bowman Joshua W</creatorcontrib><creatorcontrib>Chu Sam G</creatorcontrib><creatorcontrib>Terry David R</creatorcontrib><creatorcontrib>Nguyen Dung Q</creatorcontrib><creatorcontrib>Jeganathan Dhivya</creatorcontrib><creatorcontrib>Kucharski Cliff</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Bowman Joshua W</au><au>Chu Sam G</au><au>Terry David R</au><au>Nguyen Dung Q</au><au>Jeganathan Dhivya</au><au>Kucharski Cliff</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Parity protection of a register</title><date>2017-05-02</date><risdate>2017</risdate><abstract>The embodiments herein generate parity check data which serves as parity-on-parity. Stated differently, the parity check data can be used to determine if parity data stored in a memory element has been corrupted. For example, after generating the parity data, a computing system may set the parity check data depending on whether there is an even or odd number of logical ones (or logical zeros) in the parity data. Thus, when the parity data is read out of the memory element, if the parity data does not include the same number of even or odd bits, the parity check data indicates to the computing system that the parity data is corrupted. In one embodiment, to reduce the likelihood that the parity check data becomes corrupted, the computing system stores this data in hardened latches which are less susceptible to soft errors than other types of memory elements.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US9639418B2
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Parity protection of a register
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-28T11%3A29%3A14IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Bowman%20Joshua%20W&rft.date=2017-05-02&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS9639418B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true