Semiconductor devices with a thermally conductive layer

Semiconductor devices with a thermally conductive layer

An embodiment of a semiconductor device includes a semiconductor substrate that includes a host substrate and an upper surface, an active area, a substrate opening in the semiconductor substrate that is partially defined by a recessed surface, and a thermally conductive layer disposed over the semic...

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Hauptverfasser: Viswanathan Lakshminarayan, Green Bruce M, Hill Darrell G, Mahalingam L. M
Format: Patent
Sprache:eng
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator Viswanathan Lakshminarayan
Green Bruce M
Hill Darrell G
Mahalingam L. M
description An embodiment of a semiconductor device includes a semiconductor substrate that includes a host substrate and an upper surface, an active area, a substrate opening in the semiconductor substrate that is partially defined by a recessed surface, and a thermally conductive layer disposed over the semiconductor substrate that extends between the recessed surface and a portion of the semiconductor substrate within the active area. A method for fabricating the semiconductor device includes defining an active area, forming a gate electrode over a channel in the active area, forming a source electrode and a drain electrode in the active area on opposite sides of the gate electrode, etching a substrate opening in the semiconductor substrate that is partially defined by the recessed surface, and depositing a thermally conductive layer over the semiconductor substrate that extends between the recessed surface and a portion of the semiconductor substrate over the channel.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9614046B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9614046B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9614046B23</originalsourceid><addsrcrecordid>eNrjZDAPTs3NTM7PSylNLskvUkhJLctMTi1WKM8syVBIVCjJSC3KTczJqVSAKsksS1XISaxMLeJhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGhwZZmhiYGJmZORsZEKAEAtncuLg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor devices with a thermally conductive layer</title><source>esp@cenet</source><creator>Viswanathan Lakshminarayan ; Green Bruce M ; Hill Darrell G ; Mahalingam L. M</creator><creatorcontrib>Viswanathan Lakshminarayan ; Green Bruce M ; Hill Darrell G ; Mahalingam L. M</creatorcontrib><description>An embodiment of a semiconductor device includes a semiconductor substrate that includes a host substrate and an upper surface, an active area, a substrate opening in the semiconductor substrate that is partially defined by a recessed surface, and a thermally conductive layer disposed over the semiconductor substrate that extends between the recessed surface and a portion of the semiconductor substrate within the active area. A method for fabricating the semiconductor device includes defining an active area, forming a gate electrode over a channel in the active area, forming a source electrode and a drain electrode in the active area on opposite sides of the gate electrode, etching a substrate opening in the semiconductor substrate that is partially defined by the recessed surface, and depositing a thermally conductive layer over the semiconductor substrate that extends between the recessed surface and a portion of the semiconductor substrate over the channel.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2017</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20170404&amp;DB=EPODOC&amp;CC=US&amp;NR=9614046B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20170404&amp;DB=EPODOC&amp;CC=US&amp;NR=9614046B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Viswanathan Lakshminarayan</creatorcontrib><creatorcontrib>Green Bruce M</creatorcontrib><creatorcontrib>Hill Darrell G</creatorcontrib><creatorcontrib>Mahalingam L. M</creatorcontrib><title>Semiconductor devices with a thermally conductive layer</title><description>An embodiment of a semiconductor device includes a semiconductor substrate that includes a host substrate and an upper surface, an active area, a substrate opening in the semiconductor substrate that is partially defined by a recessed surface, and a thermally conductive layer disposed over the semiconductor substrate that extends between the recessed surface and a portion of the semiconductor substrate within the active area. A method for fabricating the semiconductor device includes defining an active area, forming a gate electrode over a channel in the active area, forming a source electrode and a drain electrode in the active area on opposite sides of the gate electrode, etching a substrate opening in the semiconductor substrate that is partially defined by the recessed surface, and depositing a thermally conductive layer over the semiconductor substrate that extends between the recessed surface and a portion of the semiconductor substrate over the channel.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2017</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAPTs3NTM7PSylNLskvUkhJLctMTi1WKM8syVBIVCjJSC3KTczJqVSAKsksS1XISaxMLeJhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGhwZZmhiYGJmZORsZEKAEAtncuLg</recordid><startdate>20170404</startdate><enddate>20170404</enddate><creator>Viswanathan Lakshminarayan</creator><creator>Green Bruce M</creator><creator>Hill Darrell G</creator><creator>Mahalingam L. M</creator><scope>EVB</scope></search><sort><creationdate>20170404</creationdate><title>Semiconductor devices with a thermally conductive layer</title><author>Viswanathan Lakshminarayan ; Green Bruce M ; Hill Darrell G ; Mahalingam L. M</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9614046B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2017</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Viswanathan Lakshminarayan</creatorcontrib><creatorcontrib>Green Bruce M</creatorcontrib><creatorcontrib>Hill Darrell G</creatorcontrib><creatorcontrib>Mahalingam L. M</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Viswanathan Lakshminarayan</au><au>Green Bruce M</au><au>Hill Darrell G</au><au>Mahalingam L. M</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor devices with a thermally conductive layer</title><date>2017-04-04</date><risdate>2017</risdate><abstract>An embodiment of a semiconductor device includes a semiconductor substrate that includes a host substrate and an upper surface, an active area, a substrate opening in the semiconductor substrate that is partially defined by a recessed surface, and a thermally conductive layer disposed over the semiconductor substrate that extends between the recessed surface and a portion of the semiconductor substrate within the active area. A method for fabricating the semiconductor device includes defining an active area, forming a gate electrode over a channel in the active area, forming a source electrode and a drain electrode in the active area on opposite sides of the gate electrode, etching a substrate opening in the semiconductor substrate that is partially defined by the recessed surface, and depositing a thermally conductive layer over the semiconductor substrate that extends between the recessed surface and a portion of the semiconductor substrate over the channel.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Semiconductor devices with a thermally conductive layer
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-08T18%3A54%3A08IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Viswanathan%20Lakshminarayan&rft.date=2017-04-04&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS9614046B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true