Apparatus and method for integrated circuit bit line sharing

A memory array includes a first memory column having a first bit line, a first word line and a second bit line. The memory array also includes a second memory column having the second bit line, a second word line and a third bit line. The first memory column and the second memory column are configur...

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Hauptverfasser:	Chen Yi-Tzu, Hu Yu-Hao, Yang Hao-I, Lin Geng-Cing, Chang Cheng-Jen
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INFORMATION STORAGE PHYSICS SEMICONDUCTOR DEVICES STATIC STORES
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creator	Chen Yi-Tzu Hu Yu-Hao Yang Hao-I Lin Geng-Cing Chang Cheng-Jen
description	A memory array includes a first memory column having a first bit line, a first word line and a second bit line. The memory array also includes a second memory column having the second bit line, a second word line and a third bit line. The first memory column and the second memory column are configured to share the second bit line. The sharing of the second bit line facilitates sharing one or more memory array components between the first memory column and the second memory column.
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title	Apparatus and method for integrated circuit bit line sharing
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