Tamper detection and response in a memory device

A technique for detecting tampering attempts directed at a memory device includes setting each of a plurality of detection memory cells to an initial predetermined state, where corresponding portions of the plurality of detection memory cells are included in each of the arrays of data storage memory...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Lin Halbert S, Andre Thomas, Subramanian Chitra K, Alam Syed M
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE PHYSICS STATIC STORES
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