Non-volatile memory (NVM) cell and device structure integration

A dielectric layer is formed over the substrate in the capacitor region and the memory region and a select gate layer is formed over the dielectric layer. A select gate is formed over the memory region and a plurality of lines of electrodes over the capacitor region from the select gate layer. A cha...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Hong Cheong Min, Sekine Satoshi
Format: Patent
Sprache:eng
Schlagworte:
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