Method of writing memory with regulated ground nodes
A method of writing data to an accessed memory cell of an accessed column of an accessed section of a memory array includes, electrically coupling a first voltage source of at least three voltage sources to a column internal ground node of the accessed column; and electrically coupling the first vol...
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| creator | Hsu Kuoyuan (Peter) Kim Young Seog Tang Yukit Tao Derek |
| description | A method of writing data to an accessed memory cell of an accessed column of an accessed section of a memory array includes, electrically coupling a first voltage source of at least three voltage sources to a column internal ground node of the accessed column; and electrically coupling the first voltage source of the at least three voltage sources to a column internal ground node of an un-accessed column of an un-accessed segment. The memory array has at least one segment. Each memory cell has an internal ground node. The at least one segment has at least one section, and each section has at least one column and at least one row. Each column has at least three switches and a column internal ground node capable of being electrically coupled to at least three voltage sources through a corresponding one of the at least three switches. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9530487B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9530487B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9530487B23</originalsourceid><addsrcrecordid>eNrjZDDxTS3JyE9RyE9TKC_KLMnMS1fITc3NL6pUKM8syVAoSk0vzUksSU1RSC_KL81LUcjLT0kt5mFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8aHBlqbGBiYW5k5GxkQoAQDv8yzJ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method of writing memory with regulated ground nodes</title><source>esp@cenet</source><creator>Hsu Kuoyuan (Peter) ; Kim Young Seog ; Tang Yukit ; Tao Derek</creator><creatorcontrib>Hsu Kuoyuan (Peter) ; Kim Young Seog ; Tang Yukit ; Tao Derek</creatorcontrib><description>A method of writing data to an accessed memory cell of an accessed column of an accessed section of a memory array includes, electrically coupling a first voltage source of at least three voltage sources to a column internal ground node of the accessed column; and electrically coupling the first voltage source of the at least three voltage sources to a column internal ground node of an un-accessed column of an un-accessed segment. The memory array has at least one segment. Each memory cell has an internal ground node. The at least one segment has at least one section, and each section has at least one column and at least one row. Each column has at least three switches and a column internal ground node capable of being electrically coupled to at least three voltage sources through a corresponding one of the at least three switches.</description><language>eng</language><subject>ELECTRICITY ; INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2016</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20161227&DB=EPODOC&CC=US&NR=9530487B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,778,883,25551,76304</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20161227&DB=EPODOC&CC=US&NR=9530487B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Hsu Kuoyuan (Peter)</creatorcontrib><creatorcontrib>Kim Young Seog</creatorcontrib><creatorcontrib>Tang Yukit</creatorcontrib><creatorcontrib>Tao Derek</creatorcontrib><title>Method of writing memory with regulated ground nodes</title><description>A method of writing data to an accessed memory cell of an accessed column of an accessed section of a memory array includes, electrically coupling a first voltage source of at least three voltage sources to a column internal ground node of the accessed column; and electrically coupling the first voltage source of the at least three voltage sources to a column internal ground node of an un-accessed column of an un-accessed segment. The memory array has at least one segment. Each memory cell has an internal ground node. The at least one segment has at least one section, and each section has at least one column and at least one row. Each column has at least three switches and a column internal ground node capable of being electrically coupled to at least three voltage sources through a corresponding one of the at least three switches.</description><subject>ELECTRICITY</subject><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2016</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDDxTS3JyE9RyE9TKC_KLMnMS1fITc3NL6pUKM8syVAoSk0vzUksSU1RSC_KL81LUcjLT0kt5mFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8aHBlqbGBiYW5k5GxkQoAQDv8yzJ</recordid><startdate>20161227</startdate><enddate>20161227</enddate><creator>Hsu Kuoyuan (Peter)</creator><creator>Kim Young Seog</creator><creator>Tang Yukit</creator><creator>Tao Derek</creator><scope>EVB</scope></search><sort><creationdate>20161227</creationdate><title>Method of writing memory with regulated ground nodes</title><author>Hsu Kuoyuan (Peter) ; Kim Young Seog ; Tang Yukit ; Tao Derek</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9530487B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2016</creationdate><topic>ELECTRICITY</topic><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>Hsu Kuoyuan (Peter)</creatorcontrib><creatorcontrib>Kim Young Seog</creatorcontrib><creatorcontrib>Tang Yukit</creatorcontrib><creatorcontrib>Tao Derek</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Hsu Kuoyuan (Peter)</au><au>Kim Young Seog</au><au>Tang Yukit</au><au>Tao Derek</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method of writing memory with regulated ground nodes</title><date>2016-12-27</date><risdate>2016</risdate><abstract>A method of writing data to an accessed memory cell of an accessed column of an accessed section of a memory array includes, electrically coupling a first voltage source of at least three voltage sources to a column internal ground node of the accessed column; and electrically coupling the first voltage source of the at least three voltage sources to a column internal ground node of an un-accessed column of an un-accessed segment. The memory array has at least one segment. Each memory cell has an internal ground node. The at least one segment has at least one section, and each section has at least one column and at least one row. Each column has at least three switches and a column internal ground node capable of being electrically coupled to at least three voltage sources through a corresponding one of the at least three switches.</abstract><oa>free_for_read</oa></addata></record> |
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| title | Method of writing memory with regulated ground nodes |
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