Using error correcting codes for parity purposes
Software that combines parity bits with error correcting codes (ECC) such that a subset of ECC bits is also used for parity purposes, by performing the following steps: (i) providing a first set of redundant bit(s) in a data block, where the first set of redundant bit(s) is adapted to detect and/or...
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creator | Klein Michael Dao Son T Mueller Silvia M Haess Juergen |
description | Software that combines parity bits with error correcting codes (ECC) such that a subset of ECC bits is also used for parity purposes, by performing the following steps: (i) providing a first set of redundant bit(s) in a data block, where the first set of redundant bit(s) is adapted to detect and/or correct errors in the data block; (ii) providing, within the first set of redundant bit(s), a first sub-set of parity bit(s), where the first sub-set of parity bit(s) is adapted to provide single bit error detection for the data block; and (iii) determining, based, at least in part, on a first set of data read requirements, whether to use the first set of redundant bit(s) and/or the first sub-set of parity bit(s) to detect and/or correct potential errors while reading data on the data block. |
format | Patent |
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(ii) providing, within the first set of redundant bit(s), a first sub-set of parity bit(s), where the first sub-set of parity bit(s) is adapted to provide single bit error detection for the data block; and (iii) determining, based, at least in part, on a first set of data read requirements, whether to use the first set of redundant bit(s) and/or the first sub-set of parity bit(s) to detect and/or correct potential errors while reading data on the data block.</description><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; CALCULATING ; CODE CONVERSION IN GENERAL ; CODING ; COMPUTING ; COUNTING ; DECODING ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRICITY ; INFORMATION STORAGE ; INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORDCARRIER AND TRANSDUCER ; PHYSICS ; STATIC STORES ; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><creationdate>2016</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20161227&DB=EPODOC&CC=US&NR=9529664B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20161227&DB=EPODOC&CC=US&NR=9529664B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Klein Michael</creatorcontrib><creatorcontrib>Dao Son T</creatorcontrib><creatorcontrib>Mueller Silvia M</creatorcontrib><creatorcontrib>Haess Juergen</creatorcontrib><title>Using error correcting codes for parity purposes</title><description>Software that combines parity bits with error correcting codes (ECC) such that a subset of ECC bits is also used for parity purposes, by performing the following steps: (i) providing a first set of redundant bit(s) in a data block, where the first set of redundant bit(s) is adapted to detect and/or correct errors in the data block; (ii) providing, within the first set of redundant bit(s), a first sub-set of parity bit(s), where the first sub-set of parity bit(s) is adapted to provide single bit error detection for the data block; and (iii) determining, based, at least in part, on a first set of data read requirements, whether to use the first set of redundant bit(s) and/or the first sub-set of parity bit(s) to detect and/or correct potential errors while reading data on the data block.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CALCULATING</subject><subject>CODE CONVERSION IN GENERAL</subject><subject>CODING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>DECODING</subject><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRICITY</subject><subject>INFORMATION STORAGE</subject><subject>INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORDCARRIER AND TRANSDUCER</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><subject>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2016</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAILc7MS1dILSrKL1JIzi8qSk0uAQkk56ekFiukAQULEosySyoVCkqLCvKLU4t5GFjTEnOKU3mhNDeDgptriLOHbmpBfnxqcUFicmpeakl8aLClqZGlmZmJk5ExEUoAOJUrig</recordid><startdate>20161227</startdate><enddate>20161227</enddate><creator>Klein Michael</creator><creator>Dao Son T</creator><creator>Mueller Silvia M</creator><creator>Haess Juergen</creator><scope>EVB</scope></search><sort><creationdate>20161227</creationdate><title>Using error correcting codes for parity purposes</title><author>Klein Michael ; Dao Son T ; Mueller Silvia M ; Haess Juergen</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9529664B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2016</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CALCULATING</topic><topic>CODE CONVERSION IN GENERAL</topic><topic>CODING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>DECODING</topic><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRICITY</topic><topic>INFORMATION STORAGE</topic><topic>INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORDCARRIER AND TRANSDUCER</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><topic>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</topic><toplevel>online_resources</toplevel><creatorcontrib>Klein Michael</creatorcontrib><creatorcontrib>Dao Son T</creatorcontrib><creatorcontrib>Mueller Silvia M</creatorcontrib><creatorcontrib>Haess Juergen</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Klein Michael</au><au>Dao Son T</au><au>Mueller Silvia M</au><au>Haess Juergen</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Using error correcting codes for parity purposes</title><date>2016-12-27</date><risdate>2016</risdate><abstract>Software that combines parity bits with error correcting codes (ECC) such that a subset of ECC bits is also used for parity purposes, by performing the following steps: (i) providing a first set of redundant bit(s) in a data block, where the first set of redundant bit(s) is adapted to detect and/or correct errors in the data block; (ii) providing, within the first set of redundant bit(s), a first sub-set of parity bit(s), where the first sub-set of parity bit(s) is adapted to provide single bit error detection for the data block; and (iii) determining, based, at least in part, on a first set of data read requirements, whether to use the first set of redundant bit(s) and/or the first sub-set of parity bit(s) to detect and/or correct potential errors while reading data on the data block.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRONIC CIRCUITRY CALCULATING CODE CONVERSION IN GENERAL CODING COMPUTING COUNTING DECODING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY INFORMATION STORAGE INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORDCARRIER AND TRANSDUCER PHYSICS STATIC STORES TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
title | Using error correcting codes for parity purposes |
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