Voltage-aware adaptive static random access memory (SRAM) write assist circuit

Approaches for a write assist circuit are provided. The write assist circuit includes a plurality of binary weighted boost capacitors which each contain a first node coupled to a bitline and a second node connected to a corresponding boost enabling transistor, and a plurality of boost enabling trans...

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Bibliographische Detailangaben

Hauptverfasser:	Hunt-Schroeder Eric D, Fifield John A, Anand Darren L, Batson Kevin A
Format:	Patent
Sprache:	eng
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
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