Adjustment of write timing in a memory device

A method and system are provided for adjusting a write timing in a memory device. For instance, the method can include receiving a data signal, a write clock signal, and a reference signal. The method can also include detecting a phase shift in the reference signal over time. The phase shift of the...

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Hauptverfasser:	Pham Toan Duc, Barakat Shadi M, Kruger Warren Fritz, Lee Ming-Ju Edward, Nygren Aaron John, Xu Xiaoling
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE PHYSICS STATIC STORES
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creator	Pham Toan Duc Barakat Shadi M Kruger Warren Fritz Lee Ming-Ju Edward Nygren Aaron John Xu Xiaoling
description	A method and system are provided for adjusting a write timing in a memory device. For instance, the method can include receiving a data signal, a write clock signal, and a reference signal. The method can also include detecting a phase shift in the reference signal over time. The phase shift of the reference signal can be used to adjust a phase difference between the data signal and the write clock signal, where the memory device recovers data from the data signal based on an adjusted write timing of the data signal and the write clock signal.
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subjects	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE PHYSICS STATIC STORES
title	Adjustment of write timing in a memory device
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