System, method, and computer program product for input/output buffer modeling
The present disclosure relates to a computer-implemented method for transient simulation of an input/output buffer model. The method may include generating an input/output buffer data file associated with a first model of an electrical circuit. The method may also include determining at least one of...
Gespeichert in:
| Hauptverfasser: | , , , , , , , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | Varma Ambrish Kant Zhou Zhongyong Tan Jilin Nagle Dennis Al-Hawari Feras Wu Shangli Meng Yubao Zhao Qi Liu Ping Schutt-Aine Jose Emmanuel |
| description | The present disclosure relates to a computer-implemented method for transient simulation of an input/output buffer model. The method may include generating an input/output buffer data file associated with a first model of an electrical circuit. The method may also include determining at least one of a node voltage and a branch current associated with the electrical circuit using, at least in part, a latency insertion method, the method may further include performing one or more simulations on a second model of an electrical circuit, the one or more simulations incorporating, at least in part, the input/output buffer data file and the latency insertion method. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9460250B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9460250B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9460250B13</originalsourceid><addsrcrecordid>eNrjZPANriwuSc3VUchNLcnIT9FRSMxLUUjOzy0oLUktUigoyk8vSswF0SmlySUKaflFCpl5QDn9_NISIKWQVJqWBlSXm5-SmpOZl87DwJqWmFOcyguluRkU3FxDnD10Uwvy41OLCxKTU_NSS-JDgy1NzAyMTA2cDI2JUAIAhhI2MQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>System, method, and computer program product for input/output buffer modeling</title><source>esp@cenet</source><creator>Varma Ambrish Kant ; Zhou Zhongyong ; Tan Jilin ; Nagle Dennis ; Al-Hawari Feras ; Wu Shangli ; Meng Yubao ; Zhao Qi ; Liu Ping ; Schutt-Aine Jose Emmanuel</creator><creatorcontrib>Varma Ambrish Kant ; Zhou Zhongyong ; Tan Jilin ; Nagle Dennis ; Al-Hawari Feras ; Wu Shangli ; Meng Yubao ; Zhao Qi ; Liu Ping ; Schutt-Aine Jose Emmanuel</creatorcontrib><description>The present disclosure relates to a computer-implemented method for transient simulation of an input/output buffer model. The method may include generating an input/output buffer data file associated with a first model of an electrical circuit. The method may also include determining at least one of a node voltage and a branch current associated with the electrical circuit using, at least in part, a latency insertion method, the method may further include performing one or more simulations on a second model of an electrical circuit, the one or more simulations incorporating, at least in part, the input/output buffer data file and the latency insertion method.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2016</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20161004&DB=EPODOC&CC=US&NR=9460250B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20161004&DB=EPODOC&CC=US&NR=9460250B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Varma Ambrish Kant</creatorcontrib><creatorcontrib>Zhou Zhongyong</creatorcontrib><creatorcontrib>Tan Jilin</creatorcontrib><creatorcontrib>Nagle Dennis</creatorcontrib><creatorcontrib>Al-Hawari Feras</creatorcontrib><creatorcontrib>Wu Shangli</creatorcontrib><creatorcontrib>Meng Yubao</creatorcontrib><creatorcontrib>Zhao Qi</creatorcontrib><creatorcontrib>Liu Ping</creatorcontrib><creatorcontrib>Schutt-Aine Jose Emmanuel</creatorcontrib><title>System, method, and computer program product for input/output buffer modeling</title><description>The present disclosure relates to a computer-implemented method for transient simulation of an input/output buffer model. The method may include generating an input/output buffer data file associated with a first model of an electrical circuit. The method may also include determining at least one of a node voltage and a branch current associated with the electrical circuit using, at least in part, a latency insertion method, the method may further include performing one or more simulations on a second model of an electrical circuit, the one or more simulations incorporating, at least in part, the input/output buffer data file and the latency insertion method.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2016</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPANriwuSc3VUchNLcnIT9FRSMxLUUjOzy0oLUktUigoyk8vSswF0SmlySUKaflFCpl5QDn9_NISIKWQVJqWBlSXm5-SmpOZl87DwJqWmFOcyguluRkU3FxDnD10Uwvy41OLCxKTU_NSS-JDgy1NzAyMTA2cDI2JUAIAhhI2MQ</recordid><startdate>20161004</startdate><enddate>20161004</enddate><creator>Varma Ambrish Kant</creator><creator>Zhou Zhongyong</creator><creator>Tan Jilin</creator><creator>Nagle Dennis</creator><creator>Al-Hawari Feras</creator><creator>Wu Shangli</creator><creator>Meng Yubao</creator><creator>Zhao Qi</creator><creator>Liu Ping</creator><creator>Schutt-Aine Jose Emmanuel</creator><scope>EVB</scope></search><sort><creationdate>20161004</creationdate><title>System, method, and computer program product for input/output buffer modeling</title><author>Varma Ambrish Kant ; Zhou Zhongyong ; Tan Jilin ; Nagle Dennis ; Al-Hawari Feras ; Wu Shangli ; Meng Yubao ; Zhao Qi ; Liu Ping ; Schutt-Aine Jose Emmanuel</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9460250B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2016</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>Varma Ambrish Kant</creatorcontrib><creatorcontrib>Zhou Zhongyong</creatorcontrib><creatorcontrib>Tan Jilin</creatorcontrib><creatorcontrib>Nagle Dennis</creatorcontrib><creatorcontrib>Al-Hawari Feras</creatorcontrib><creatorcontrib>Wu Shangli</creatorcontrib><creatorcontrib>Meng Yubao</creatorcontrib><creatorcontrib>Zhao Qi</creatorcontrib><creatorcontrib>Liu Ping</creatorcontrib><creatorcontrib>Schutt-Aine Jose Emmanuel</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Varma Ambrish Kant</au><au>Zhou Zhongyong</au><au>Tan Jilin</au><au>Nagle Dennis</au><au>Al-Hawari Feras</au><au>Wu Shangli</au><au>Meng Yubao</au><au>Zhao Qi</au><au>Liu Ping</au><au>Schutt-Aine Jose Emmanuel</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>System, method, and computer program product for input/output buffer modeling</title><date>2016-10-04</date><risdate>2016</risdate><abstract>The present disclosure relates to a computer-implemented method for transient simulation of an input/output buffer model. The method may include generating an input/output buffer data file associated with a first model of an electrical circuit. The method may also include determining at least one of a node voltage and a branch current associated with the electrical circuit using, at least in part, a latency insertion method, the method may further include performing one or more simulations on a second model of an electrical circuit, the one or more simulations incorporating, at least in part, the input/output buffer data file and the latency insertion method.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US9460250B1 |
| source | esp@cenet |
| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | System, method, and computer program product for input/output buffer modeling |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-06T11%3A20%3A50IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Varma%20Ambrish%20Kant&rft.date=2016-10-04&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS9460250B1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |