Via placement within an integrated circuit

An integrated circuit layout is formed by performing a routing step forming a routing layout of routing conductors and routing connection vias prior to performing a power grid connection step which forms power connection vias between power grid conductors and standard-power cell conductors within th...

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1. Verfasser:	Frederick, Jr. Marlin Wayne
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY PHYSICS SEMICONDUCTOR DEVICES
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creator	Frederick, Jr. Marlin Wayne
description	An integrated circuit layout is formed by performing a routing step forming a routing layout of routing conductors and routing connection vias prior to performing a power grid connection step which forms power connection vias between power grid conductors and standard-power cell conductors within the standard cells. This enables a minimum via spacing requirement to be met while permitting an increased flexibility in the positioning of the routing connection vias.
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title	Via placement within an integrated circuit
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