Non-planar field effect transistor test structure and lateral dielectric breakdown testing method

Disclosed are test structures and methods for non-planar field effect transistors. The test structures comprise test device(s) on an insulator layer. Each device comprises semiconductor fin(s). Each fin has a first portion comprising a pseudo channel region at one end and a second portion comprising...

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Bibliographische Detailangaben

Hauptverfasser:	Dufresne Roger A, Shinosky Michael A, Kolvenbach Kevin, Chen Fen
Format:	Patent
Sprache:	eng
Schlagworte:	MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS TESTING
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