Interconnect circuits at three-dimensional (3-D) bonding interfaces of a processor array

Embodiments of the invention relate to processor arrays, and in particular, a processor array with interconnect circuits for bonding semiconductor dies. One embodiment comprises multiple semiconductor dies and at least one interconnect circuit for exchanging signals between the dies. Each die compri...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	IYER SUBRAMANIAN S, MEROLLA PAUL A, MODHA DHARMENDRA S, JACKSON BRYAN L, CASSIDY ANDREW S, BARTH JOHN E, ALVAREZ-ICAZA RIVERA RODRIGO, SAWADA JUN, ARTHUR JOHN V
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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