Semiconductor device with an isolation structure coupled to a cover of the semiconductor device
A system and method for packaging a semiconductor device that includes a structure to reduce electromagnetic coupling are presented. The semiconductor device is formed on a substrate. A cover is affixed to the substrate so as to extend over the semiconductor device. An isolation structure of electri...
Gespeichert in:
| Hauptverfasser: | , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | WATTS MICHAEL E ABDO DAVID F LAKSHMINARAYAN VISWANATHAN |
| description | A system and method for packaging a semiconductor device that includes a structure to reduce electromagnetic coupling are presented. The semiconductor device is formed on a substrate. A cover is affixed to the substrate so as to extend over the semiconductor device. An isolation structure of electrically conductive material is coupled to the cover in between components of the semiconductor device, with the isolation structure being configured to reduce inductive coupling between those components during an operation of the semiconductor device. In one version, the isolation structure includes a first leg extending from a ground connection along a side wall of the cover to a cross member contiguous with a primary cover wall that extends over the semiconductor device between the components to be isolated electromagnetically. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9349693B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9349693B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9349693B23</originalsourceid><addsrcrecordid>eNqNjDEKAjEUBdNYiHqHdwEbI0JaRbFfrUNI_rKBmB-Sn_X6bmFpYTUMDLNWdqBX9JxD98IVgeboCe8oE1xGbJycRM5oUpeiV4LnXhIFCMMtMlMFj5CJ0H6stmo1utRo9-VG4XZ9XO57KmypFecpk9jnYPTRnIw-H_QfyQdR6z0_</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device with an isolation structure coupled to a cover of the semiconductor device</title><source>esp@cenet</source><creator>WATTS MICHAEL E ; ABDO DAVID F ; LAKSHMINARAYAN VISWANATHAN</creator><creatorcontrib>WATTS MICHAEL E ; ABDO DAVID F ; LAKSHMINARAYAN VISWANATHAN</creatorcontrib><description>A system and method for packaging a semiconductor device that includes a structure to reduce electromagnetic coupling are presented. The semiconductor device is formed on a substrate. A cover is affixed to the substrate so as to extend over the semiconductor device. An isolation structure of electrically conductive material is coupled to the cover in between components of the semiconductor device, with the isolation structure being configured to reduce inductive coupling between those components during an operation of the semiconductor device. In one version, the isolation structure includes a first leg extending from a ground connection along a side wall of the cover to a cross member contiguous with a primary cover wall that extends over the semiconductor device between the components to be isolated electromagnetically.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2016</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160524&DB=EPODOC&CC=US&NR=9349693B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160524&DB=EPODOC&CC=US&NR=9349693B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>WATTS MICHAEL E</creatorcontrib><creatorcontrib>ABDO DAVID F</creatorcontrib><creatorcontrib>LAKSHMINARAYAN VISWANATHAN</creatorcontrib><title>Semiconductor device with an isolation structure coupled to a cover of the semiconductor device</title><description>A system and method for packaging a semiconductor device that includes a structure to reduce electromagnetic coupling are presented. The semiconductor device is formed on a substrate. A cover is affixed to the substrate so as to extend over the semiconductor device. An isolation structure of electrically conductive material is coupled to the cover in between components of the semiconductor device, with the isolation structure being configured to reduce inductive coupling between those components during an operation of the semiconductor device. In one version, the isolation structure includes a first leg extending from a ground connection along a side wall of the cover to a cross member contiguous with a primary cover wall that extends over the semiconductor device between the components to be isolated electromagnetically.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2016</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjDEKAjEUBdNYiHqHdwEbI0JaRbFfrUNI_rKBmB-Sn_X6bmFpYTUMDLNWdqBX9JxD98IVgeboCe8oE1xGbJycRM5oUpeiV4LnXhIFCMMtMlMFj5CJ0H6stmo1utRo9-VG4XZ9XO57KmypFecpk9jnYPTRnIw-H_QfyQdR6z0_</recordid><startdate>20160524</startdate><enddate>20160524</enddate><creator>WATTS MICHAEL E</creator><creator>ABDO DAVID F</creator><creator>LAKSHMINARAYAN VISWANATHAN</creator><scope>EVB</scope></search><sort><creationdate>20160524</creationdate><title>Semiconductor device with an isolation structure coupled to a cover of the semiconductor device</title><author>WATTS MICHAEL E ; ABDO DAVID F ; LAKSHMINARAYAN VISWANATHAN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9349693B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2016</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>WATTS MICHAEL E</creatorcontrib><creatorcontrib>ABDO DAVID F</creatorcontrib><creatorcontrib>LAKSHMINARAYAN VISWANATHAN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>WATTS MICHAEL E</au><au>ABDO DAVID F</au><au>LAKSHMINARAYAN VISWANATHAN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device with an isolation structure coupled to a cover of the semiconductor device</title><date>2016-05-24</date><risdate>2016</risdate><abstract>A system and method for packaging a semiconductor device that includes a structure to reduce electromagnetic coupling are presented. The semiconductor device is formed on a substrate. A cover is affixed to the substrate so as to extend over the semiconductor device. An isolation structure of electrically conductive material is coupled to the cover in between components of the semiconductor device, with the isolation structure being configured to reduce inductive coupling between those components during an operation of the semiconductor device. In one version, the isolation structure includes a first leg extending from a ground connection along a side wall of the cover to a cross member contiguous with a primary cover wall that extends over the semiconductor device between the components to be isolated electromagnetically.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US9349693B2 |
| source | esp@cenet |
| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Semiconductor device with an isolation structure coupled to a cover of the semiconductor device |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-13T01%3A30%3A43IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=WATTS%20MICHAEL%20E&rft.date=2016-05-24&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS9349693B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |