Contact critical dimension control

Contact critical dimension control

In a method for manufacturing a semiconductor device, a dielectric layer is formed on a substrate, and a contact hole is formed from the dielectric layer to the substrate. A dielectric spacer liner is formed to cover a sidewall and a bottom of the contact hole. A portion of the dielectric spacer lin...

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Hauptverfasser: LAI CHIA-HAN, YU REN-HAU, SUN CHING-YAO, WANG YU-SHENG, CHANG TAIN-SHANG
Format: Patent
Sprache:eng
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator LAI CHIA-HAN
YU REN-HAU
SUN CHING-YAO
WANG YU-SHENG
CHANG TAIN-SHANG
description In a method for manufacturing a semiconductor device, a dielectric layer is formed on a substrate, and a contact hole is formed from the dielectric layer to the substrate. A dielectric spacer liner is formed to cover a sidewall and a bottom of the contact hole. A portion of the dielectric spacer liner is removed to expose a portion of the substrate. A metal silicide layer is formed into the substrate through the contact hole.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9299607B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9299607B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9299607B23</originalsourceid><addsrcrecordid>eNrjZFByzs8rSUwuUUguyizJTE7MUUjJzE3NK87Mz1NIBkoV5efwMLCmJeYUp_JCaW4GBTfXEGcP3dSC_PjU4oLE5NS81JL40GBLI0tLMwNzJyNjIpQAAIjmJi0</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Contact critical dimension control</title><source>esp@cenet</source><creator>LAI CHIA-HAN ; YU REN-HAU ; SUN CHING-YAO ; WANG YU-SHENG ; CHANG TAIN-SHANG</creator><creatorcontrib>LAI CHIA-HAN ; YU REN-HAU ; SUN CHING-YAO ; WANG YU-SHENG ; CHANG TAIN-SHANG</creatorcontrib><description>In a method for manufacturing a semiconductor device, a dielectric layer is formed on a substrate, and a contact hole is formed from the dielectric layer to the substrate. A dielectric spacer liner is formed to cover a sidewall and a bottom of the contact hole. A portion of the dielectric spacer liner is removed to expose a portion of the substrate. A metal silicide layer is formed into the substrate through the contact hole.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2016</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20160329&amp;DB=EPODOC&amp;CC=US&amp;NR=9299607B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20160329&amp;DB=EPODOC&amp;CC=US&amp;NR=9299607B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LAI CHIA-HAN</creatorcontrib><creatorcontrib>YU REN-HAU</creatorcontrib><creatorcontrib>SUN CHING-YAO</creatorcontrib><creatorcontrib>WANG YU-SHENG</creatorcontrib><creatorcontrib>CHANG TAIN-SHANG</creatorcontrib><title>Contact critical dimension control</title><description>In a method for manufacturing a semiconductor device, a dielectric layer is formed on a substrate, and a contact hole is formed from the dielectric layer to the substrate. A dielectric spacer liner is formed to cover a sidewall and a bottom of the contact hole. A portion of the dielectric spacer liner is removed to expose a portion of the substrate. A metal silicide layer is formed into the substrate through the contact hole.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2016</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFByzs8rSUwuUUguyizJTE7MUUjJzE3NK87Mz1NIBkoV5efwMLCmJeYUp_JCaW4GBTfXEGcP3dSC_PjU4oLE5NS81JL40GBLI0tLMwNzJyNjIpQAAIjmJi0</recordid><startdate>20160329</startdate><enddate>20160329</enddate><creator>LAI CHIA-HAN</creator><creator>YU REN-HAU</creator><creator>SUN CHING-YAO</creator><creator>WANG YU-SHENG</creator><creator>CHANG TAIN-SHANG</creator><scope>EVB</scope></search><sort><creationdate>20160329</creationdate><title>Contact critical dimension control</title><author>LAI CHIA-HAN ; YU REN-HAU ; SUN CHING-YAO ; WANG YU-SHENG ; CHANG TAIN-SHANG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9299607B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2016</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>LAI CHIA-HAN</creatorcontrib><creatorcontrib>YU REN-HAU</creatorcontrib><creatorcontrib>SUN CHING-YAO</creatorcontrib><creatorcontrib>WANG YU-SHENG</creatorcontrib><creatorcontrib>CHANG TAIN-SHANG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LAI CHIA-HAN</au><au>YU REN-HAU</au><au>SUN CHING-YAO</au><au>WANG YU-SHENG</au><au>CHANG TAIN-SHANG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Contact critical dimension control</title><date>2016-03-29</date><risdate>2016</risdate><abstract>In a method for manufacturing a semiconductor device, a dielectric layer is formed on a substrate, and a contact hole is formed from the dielectric layer to the substrate. A dielectric spacer liner is formed to cover a sidewall and a bottom of the contact hole. A portion of the dielectric spacer liner is removed to expose a portion of the substrate. A metal silicide layer is formed into the substrate through the contact hole.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Contact critical dimension control
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-24T16%3A50%3A37IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=LAI%20CHIA-HAN&rft.date=2016-03-29&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS9299607B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true