Memory cell array

A semiconductor memory cell array is disclosed that includes a memory cell unit. The memory cell unit includes an active region, a first transistor, a second transistor, a gate structure, and an interconnect. The first transistor and the second transistor are formed on the active region. The gate st...

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Hauptverfasser:	TIEN LIUN, LIAW JHON-JHY, PAN KUO-HUA, TIEN CHIENI, CHENG HONGN, CHANG SHI-WEI
Format:	Patent
Sprache:	eng
Schlagworte:	ELECTRICITY INFORMATION STORAGE PHYSICS STATIC STORES
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creator	TIEN LIUN LIAW JHON-JHY PAN KUO-HUA TIEN CHIENI CHENG HONGN CHANG SHI-WEI
description	A semiconductor memory cell array is disclosed that includes a memory cell unit. The memory cell unit includes an active region, a first transistor, a second transistor, a gate structure, and an interconnect. The first transistor and the second transistor are formed on the active region. The gate structure is formed on the active region and between the first transistor and the second transistor. The interconnect connects the gate structure and at least one of sources of the first transistor and the second transistor to a power line.
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subjects	ELECTRICITY INFORMATION STORAGE PHYSICS STATIC STORES
title	Memory cell array
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