Information processing device including memory management device managing access from processor to memory and memory management method

A device according to an example of the invention comprises a section which accepts a write destination logical address and write target data from a processor, the write destination logical address indicating a write position to write the write target data into a composite memory which includes a fi...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	NOZUE HIROSHI, SAKAMOTO HIROYUKI, KAWAGOME KAZUHIRO, MIYAGAWA MASAKI, NAKAI HIROTO, KUNIMATSU ATSUSHI, MAEDA KENICHI
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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